About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell's Central Engineering AMS-IP organization provides the most advanced key Analog & Mixed Signal IPs to all businesses with Marvell, including Data Center, Networking, Storage, Security and etc.

What You Can Expect

You will be part of Marvell’s Central Engineering AMS-IP group, leading a high-performing analog design team focused on developing advanced circuits for next-generation high-speed wireline and optical products.

• Provide direct leadership to teams of analog mixed-signal design engineers focused on high-speed wireline communication technologies.
• Own design execution, ensuring high-quality deliverables and adherence to project schedules.
• Collaborate with system and architecture teams to identify optimal circuit solutions based on cost, performance, and risk trade-offs.
• Oversee the design of various analog IPs, including Ser Des, Die-to-Die interfaces, and foundational analog building blocks.
• Work closely with cross-functional teams, including RTL, DSP, firmware, design verification, and physical design—to drive successful project execution.
• Support post-silicon testing and validation of analog mixed-signal circuits to ensure performance and reliability.
• Conduct rigorous design reviews to maintain quality standards and ensure compliance with project requirements.
• Champion continuous improvement in execution efficiency and design quality across the team.

What We're Looking For

• MSEE with 15 years of industry experience.
• At least 5 years of experience managing a team of 10 or more engineers.
• 10 years of proven expertise in advanced analog circuit or IP development.
• 8 years of hands-on experience with NRZ and PAM4 Ser Des technologies.
• Familiarity with mixed-signal IP development flows is highly desirable
• Strong communication and interpersonal skills, with a demonstrated ability to collaborate effectively across multiple functional teams and product groups.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.