About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

This is an existing vacancy.

Your Team, Your Impact

As a Digital IC Design Senior Staff Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a smal digital team making a big impact on this organization, working on ultra-dense and performance Static Random Access Memory (SRAM) memory compilers.
This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.

What You Can Expect:

Your day-to-day activities include iterative testing, documentation, summarization of findings, and collaboration with the global team through regular meetings, ensuring alignment within the 18-month project cycles. Tools such as Python, Perl, and the Microsoft Office Suite will be integral to your tasks, and proficiency in a Linux environment is essential for seamless execution.

Inthis role you will:

• Support other design team member with Front end tools such as Synthesis, LEC, STA, CDC, RDC and other EDA tools

• Participate in the micro-architecture definition of various Sub Systems and/or the chip

• Write specifications and micro-architecture of the design

• Implement designs using low-power RTL coding techniques

• Collaborate with the verification team on the verification test plan, coverage analysis, and full-chip simulation plus debug

• Work with the physical design team in aiding the implementation of the functional blocks

• Interact with the project lead to scope tasks

• Work with multiple design centers and design groups on the development of the projects

• Support the post silicon team to bring up silicon in the lab

• Work with the software team and in some cases the customer to ensure product meets customer use cases

• Independently analyze and optimize small sub-circuit blocks within our overall design across Process, Voltage, Temperature

What We're Looking For

Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5+ years of related professional experience. OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3+ years of experience.

• Prior experience with at least one major sub-circuit block from architecture definition to fine tuning.
• Experience Identifying and proposing innovative solutions to enhance the design of at least one major sub-circuit block.
• Participation in root cause investigation and silicon validation of model to hardware correlation issues.
• Experience Mentoring and coaching new and/or less experienced team members.
• Familiar with the full ASIC Design Flow, Front End, and Back End

Also requires expertise in one or more of the following:

• Clocking and Reset, Architecture, CDC, RDC and related tools
• Equivalence checking and related EDA tools
• Static timing analysis and related EDA tools
• Verilog coding, and ease to translate back and forth to digital circuit block diagrams
• Design for Testability
• Lab debuging and designing ciruit for lab debug
• Waveform debugging, with RTL simulator.
• EDA tools for Synthesis, Floorplanning, Physical design

Expected Base Pay Range (CAD)

118,700 - 158,300, $ per annum

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

Marvell may employ artificial intelligence technologies to assist in the evaluation of job applications. All application reviews include meaningful human involvement, and no hiring decisions are made solely on the basis of automated processing.