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职位Marvell

Director of Hardware Engineering – High-Speed Board Design & Signal Integrity

Marvell

Director of Hardware Engineering – High-Speed Board Design & Signal Integrity

Marvell

Santa Clara, CA

·

On-site

·

Full-time

·

2mo ago

薪酬

$185,390 - $277,700

福利待遇

Equity

Mental Health

必备技能

PCB design

Signal integrity

Power integrity

SerDes design

Team Leadership

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

We are seeking a Director of Hardware Engineering to lead the design, analysis, and validation of high-speed board-level hardware for advanced Ser Des-based systems. The ideal candidate combines deep expertise in high-speed PCB design, signal integrity (SI), and power integrity (PI) with strong leadership experience in guiding multidisciplinary engineering teams.

You will be responsible for defining board architectures, ensuring SI/PI compliance, managing prototype validation, and delivering high-performance hardware that meets timing, reliability, and manufacturability goals.

What You Can Expect Leadership & Strategy

  • Lead and mentor a high-performance team of hardware engineers focused on PCB design, SI/PI analysis, and board bring-up.

  • Define hardware engineering roadmap and standards for high-speed Ser Des board designs.

  • Collaborate with executive leadership and cross-functional teams to align technical strategy with business objectives.

Technical Direction

  • Oversee high-speed PCB design, including layout, stackup planning, routing, and signal/power integrity optimization.

  • Lead signal integrity (SI) and power integrity (PI) simulations, including crosstalk, return loss, insertion loss, and PDN analysis.

  • Ensure robust integration with Ser Des ICs, memory, connectors, and high-speed interconnects.

  • Establish board-level validation, lab testing, and measurement methodologies for high-speed interfaces.

  • Provide guidance on thermal management and manufacturability.

Execution Management

  • Manage the full hardware lifecycle: concept, schematic, layout, prototype, testing, and production release.

  • Define and enforce engineering best practices, design rules, and documentation standards.

  • Coordinate with IC, firmware, and system teams to ensure end-to-end signal and power performance.

  • Drive continuous improvement in design methodologies, SI/PI tool flows, and lab measurement capabilities.

What We're Looking For

  • Bachelor’s or Master’s degree in Electrical Engineering or related field.

  • 12 years of hardware engineering experience, including 5 years in leadership or management.

  • Deep expertise in high-speed PCB layout, Ser Des board-level design, and SI/PI analysis.

  • Past experience and familiarity with SI/PI simulation tools (e.g., Hyper Lynx, Ansys SIwave, CST, Keysight ADS).

  • Strong understanding of power delivery networks, signal integrity, and high-speed design constraints.

  • Proven track record in leading hardware teams from concept through production for high-speed systems.

Preferred:

  • Experience with multi-layer high-speed boards, differential signaling, and advanced connectors.

  • Familiarity with high-performance computing, networking, or data center hardware platforms.

  • Experience with lab-based high-speed measurements, such as TDR, VNA, and eye-diagram analysis.

Expected Base Pay Range (USD)

185,390 - 277,700, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOpsmarvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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关于Marvell

Marvell

Marvell

Public

Marvell Technology, Inc. is an American company, headquartered in Santa Clara, California, which develops and produces semiconductors and related technology.

5,001-10,000

员工数

Santa Clara

总部位置

$15.2B

企业估值

评价

3.6

10条评价

工作生活平衡

3.2

薪酬

3.8

企业文化

3.5

职业发展

2.8

管理层

2.9

65%

推荐给朋友

优点

Good benefits and compensation

Supportive team and leadership

Flexible work arrangements

缺点

Limited career advancement opportunities

High workload and long hours

Poor management and communication

薪资范围

16个数据点

Junior/L3

Junior/L3 · DATA SCIENCE AND ENGINEERING PROFESSIONAL II

1份报告

$111,800

年薪总额

基本工资

$86,000

股票

-

奖金

-

$111,800

$111,800

面试经验

1次面试

难度

4.0

/ 5

时长

14-28周

录用率

100%

体验

正面 100%

中性 0%

负面 0%

面试流程

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Technical Interview

5

Final Round/Onsite

6

Offer

常见问题

Technical Knowledge

System Design

Behavioral/STAR

Past Experience

UI/Frontend Architecture