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채용Marvell

RTL Design Principal Engineer

Marvell

RTL Design Principal Engineer

Marvell

Bangalore

·

On-site

·

Full-time

·

Today

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell Data Centre Engineering (DCE) - Compute & Storage (CCS) BU has been at the forefront of developing and delivering leading-edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast‐growing product lines, Marvell technology is powering the next‐generation data processing and workload acceleration platforms for the Carrier, Cloud/Enterprise and Automotive Compute market segments. The team focusses on the Custom ASIC business, Cloud AI solutions & Enterprise/Career solutions including the CXL product line.

What You Can Expect

  • Define the sub system architecture, micro-architecture and register specification for highly complex So Cs. Drive and participate in specification writeup
  • Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers
  • Implement a specification using RTL coding techniques and best practices
  • Work with third party vendors to define customization requirements of third party IPs (controller, PHY, etc.)
  • Work with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff.
  • Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation and emulation, performance and power analysis and debug
  • Help develop and/or evaluate design and verification methodologies and participate in improving existing ones
  • Collaborate with and provide guidance to the post silicon and software teams for prototype bring up and performance tuning
  • Provide mentorship to the more junior team member

What We're Looking For

  • Bachelor's OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 12+ years of experience.
  • Experience in creating architectural, micro-architectural, and register specifications.
  • Verilog/System Verilog RTL coding with System Verilog assertions
  • Well-versed in all stages of the ASIC design flow (including specification, architecture and design implementation, prototype bring-up)
  • Expertise in high speed protocols (Ethernet).
  • Should have worked on Full Chip Integration of Complex SoC design.
  • Has worked on complex chips such as network processors, CPUs ,GPUs ,NOCs ,Switches , Machine Learning So Cs etc. owning full chip, subsystem and block level architecture and design
  • Expertise in any of the following domains would be a big plus: networking, embedded systems architecture, computer architecture, machine learning accelerators
  • Experience with scripting in Perl/Python/Shell

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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Marvell 소개

Marvell

Marvell

Public

Marvell Technology, Inc. is an American company, headquartered in Santa Clara, California, which develops and produces semiconductors and related technology.

5,001-10,000

직원 수

Santa Clara

본사 위치

$15.2B

기업 가치

리뷰

3.6

10개 리뷰

워라밸

3.2

보상

3.8

문화

3.5

커리어

2.8

경영진

2.9

62%

친구에게 추천

장점

Good benefits and compensation

Supportive team and leadership

Flexible work arrangements

단점

Limited career advancement opportunities

High workload and long hours

Poor management communication

연봉 정보

16개 데이터

Junior/L3

Junior/L3 · DATA SCIENCE AND ENGINEERING PROFESSIONAL II

1개 리포트

$111,800

총 연봉

기본급

$86,000

주식

-

보너스

-

$111,800

$111,800

면접 경험

1개 면접

난이도

3.0

/ 5

소요 기간

14-28주

합격률

100%

경험

긍정 100%

보통 0%

부정 0%

면접 과정

1

Application Review

2

Recruiter Call

3

Technical Screen

4

Final Round Interview

5

Offer Decision

자주 나오는 질문

Technical Knowledge

System Design

Behavioral/STAR

Past Experience

UI/UX Design Principles