
Leading company in the technology industry
Sr. Principal Engineer, RTL ASIC Design at Marvell
About the role
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI,
automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those
looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Custom and Compute Solutions Business Unit closely collaborates with strategic customers in the development of advanced and highly complex
So Cs, from architecture and design all the way through layout, packaging, prototype validation and production ramp up.
What You Can Expect
- Define the sub system architecture, micro-architecture and register specification for highly complex So Cs. Drive and participate in specification writeup
- Work closely with system and chip architects to design industrial quality implementations.
- Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers
- Implement a specification using RTL coding techniques and best practices
- Work with third party vendors to define customization requirements of third party IPs (controller, PHY, etc.)
- Work with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff.
- Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation and emulation, performance and power analysis and debug
- Help develop and/or evaluate design and verification methodology
What We're Looking For
- Bachelor’s/Masters degree in Computer Science, Electrical Engineering or related fields and 18+ years of related professional experience. PhD in Computer Science, Electrical Engineering or related fields with 16+ years of experience.
- Architect and design SoC, subsystems (reset, boot, power, security, access control, debug, CPU, DSP, AI accelerators).
- Define specifications, microarchitecture, and use cases with cross-functional teams.
- Collaborate with hardware, firmware, and security teams to ensure design efficiency.
- Perform trade-off analysis (area, power, performance, security, HW/SW reusability).
- Work on high-speed interconnects (PCIe, CXL, DDR) and system caches.
- Strong experience in SoC architecture, HW microarchitecture, and security.
- Expertise in ARM-based SoC architectures, including compute, memory management, and virtualization.
- Knowledge of high/low-speed peripherals, DDR, interconnects, QoS, and power management.
- Experience in performance analysis, simulation, modeling, and VLSI design flow.
- Proficiency in HDL, scripting, and digital design.
- Strong communication and collaboration skills for global teams.
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
Required skills
RTL design
ASIC design
SoC architecture
Micro-architecture
Register specification
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About Marvell

Marvell
PublicMarvell Technology, Inc. is an American company, headquartered in Santa Clara, California, which develops and produces semiconductors and related technology.
5,001-10,000
Employees
Santa Clara
Headquarters
$15.2B
Valuation
Reviews
10 reviews
4.0
10 reviews
Work-life balance
4.2
Compensation
3.5
Culture
4.1
Career
3.2
Management
3.4
75%
Recommend to a friend
Pros
Supportive team and leadership
Good work-life balance and flexibility
Collaborative and inclusive environment
Cons
Management issues and disorganization
Limited career advancement opportunities
High workload and stress
Salary Ranges
16 data points
Junior/L3
Junior/L3 · DATA SCIENCE AND ENGINEERING PROFESSIONAL II
1 reports
$111,800
total per year
Base
$86,000
Stock
-
Bonus
-
$111,800
$111,800
Interview experience
1 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Offer rate
100%
Experience
Positive 100%
Neutral 0%
Negative 0%
Interview process
1
Application Review
2
Recruiter Call
3
Technical Screen
4
Final Round Interview
5
Offer Decision
Common questions
Technical Knowledge
System Design
Behavioral/STAR
Past Experience
UI/UX Design Principles
Latest updates
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News
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