
Leading company in the technology industry
Principal Engineer, Digital IC Design at Marvell
About the role
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
This is an existing vacancy.
Your Team, Your Impact
Central Engineering AMS-IP team provides leading-edge Ser Des PHY solutions and other Analog Mixed-Signal IPs to support all Marvell products.
What You Can Expect
ASIC design engineer responsible for planning and coordinating the design, verification, and evaluation of analog mixed-signal circuits in high-speed data communication ICs. The candidate will work closely with digital design, design verification, firmware, and analog design engineers to ensure that projects are completed on time and in high quality.
The responsibilities include but are not limited to.
- Collaborate with Analog/DSP/DV/FW/AE teams to coordinate the delivery of competitive Ser Des IP solutions for all the Marvell product lines.
- Understand and improve the unique in-house design methodology and flow.
- Provide support to the product teams for both pre and post silicon.
- Lead the development and execution of analog mixed-signal development
- Work with cross-functional teams to define requirements, create schedules and budgets, manage risks, and communicate with stakeholders.
- Develop and maintain relationships with key stakeholders.
- Identify and mitigate risks to project success.
- Track and report on analog mixed-signal IP development progress
- Continuously improve project execution processes
What We're Looking For
Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience.
Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience.
Good personal communication skills and team working spirit.
Hardworking and motivated to be part of a highly competent design team.
Must be proficient in the following skills:
- Fundamental concepts in high-speed analog mixed-signal Ser Des design
- Fundamental concepts in digital design, design verification, and timing closure
- Concepts in physical and layout design
- Excellent cross-discipline communication and interpersonal skills
- Ability to work independently and as part of a team
- Strong problem-solving and decision-making skills
- Concepts digital logic timing analysis
- Verilog/VHDL coding and Lint tools
Highly desirable skills:
- Experience with MAC and PHY integration
- Experience with silicon validation
- Micro-controller 8051 or ARM Cortex experience
- Micro-controller firmware experience
- Synthesis using Synopsys or Cadence tools
- Timing analysis using Primetime
- DFT concepts of Scan, BIST
Expected Base Pay Range (CAD)
145,800 - 194,400, $ per annum
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
Marvell may employ artificial intelligence technologies to assist in the evaluation of job applications. All application reviews include meaningful human involvement, and no hiring decisions are made solely on the basis of automated processing.
Required skills
Digital IC design
ASIC development
Mixed-signal integration
SerDes
Design methodology
Cross-functional leadership
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About Marvell

Marvell
PublicMarvell Technology, Inc. is an American company, headquartered in Santa Clara, California, which develops and produces semiconductors and related technology.
5,001-10,000
Employees
Santa Clara
Headquarters
$15.2B
Valuation
Reviews
10 reviews
4.0
10 reviews
Work-life balance
4.2
Compensation
3.5
Culture
4.1
Career
3.2
Management
3.4
75%
Recommend to a friend
Pros
Supportive team and leadership
Good work-life balance and flexibility
Collaborative and inclusive environment
Cons
Management issues and disorganization
Limited career advancement opportunities
High workload and stress
Salary Ranges
16 data points
Junior/L3
Junior/L3 · DATA SCIENCE AND ENGINEERING PROFESSIONAL II
1 reports
$111,800
total per year
Base
$86,000
Stock
-
Bonus
-
$111,800
$111,800
Interview experience
1 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Offer rate
100%
Experience
Positive 100%
Neutral 0%
Negative 0%
Interview process
1
Application Review
2
Recruiter Call
3
Technical Screen
4
Final Round Interview
5
Offer Decision
Common questions
Technical Knowledge
System Design
Behavioral/STAR
Past Experience
UI/UX Design Principles
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