About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The Switch Business Unit in Marvell designs and develops the next generation datacenter and enterprise System-On-Chip switch processors on leading edge process technology. We develop the architecture, collaborate on IP development, create the physical design, develop switching solutions and work with the world’s leading data center and enterprise companies to bring next generation networking to reality.

What You Can Expect

1. TESTBENCH DEVELOPMENT & MAINTENANCE - Build and maintain comprehensive SoC testbenches using UVM verification
   methodology

• Design and implement verification environments for complex SoC designs
• Develop reusable verification components and infrastructure

TEST PLANNING & STRATEGY:

• Write and update test plans based on Architecture documents
• Collaborate with design and DV teams to incorporate feedback
• Define verification goals and coverage metrics
• Ensure comprehensive coverage of design specifications

TEST DEVELOPMENT & DEBUGGING:

• Write new tests and debug existing test failures
• Analyze logs and waveforms to verify test intent
• Identify and resolve design issues through systematic debugging
• Maintain test suites and ensure regression stability

CHIP BRING-UP & INITIALIZATION:

• Participate in chip bring-up activities
• Verify clock and reset functionality
• Implement and validate initialization sequences
• Generate and validate packet generation for protocol testing

VERIFICATION ENVIRONMENT DESIGN:

• Build verification components including:
  Sequences and sequencers
  Monitors and scoreboards
  Self-checking mechanisms
  Constraint-random test generation
• Implement protocol-specific verification components

1. ARCHITECTURE-SPECIFIC VERIFICATION

• Verify Ethernet Switch architecture including:
  Forward processor functionality
  Traffic manager operations
  Scheduler implementation and behavior

• Verify CPU Management architecture including:
  Interface protocols: PCIe, AXI, MDIO, I2C
  Switch fabric management
  Interrupt handling and prioritization
  Register access and configuration
  DMA engine operations

VERIFICATION CLOSURE & QUALITY ASSURANCE:

• Review chip checklist items including:
  Coverage analysis and closure
  Interrupt verification
  Gate-level simulation
  X-propagation (xprop) analysis
  Initial register (initreg) verification
  Assertion-based verification
• Ensure design meets quality and verification goals

BOARD BRING-UP SUPPORT:

• Support board bring-up activities
• Validate hardware behavior against simulation models
• Debug hardware-software integration issues

What We're Looking For:

We are seeking experienced So

C ASIC Verification Engineers to join our Design:

Verification team. You will be responsible for developing and maintaining
comprehensive verification environments for complex System-on-Chip (SoC) designs, with a focus on Ethernet Switch and CPU Management architectures. This role requires expertise in building robust testbenches, creating effective test plans, and ensuring design quality through rigorous verification methodologies.

REQUIRED QUALIFICATIONS:

EXPERIENCE:

• Minimum 5+ years of experience in SoC verification
• Minimum 5+ years of experience in Ethernet Switch validation
• Minimum 5+ years of experience in CPU Management verification
• Proven track record of successful verification closure on complex So Cs

TECHNICAL EXPERTISE:

Languages:

• Verilog (advanced proficiency)
• System Verilog (advanced proficiency)
• C/C++ (proficient)

Verification Methodology:

• UVM (Universal Verification Methodology) expertise including:
  Program blocks and testbenches
  Sequences and sequencers
  Transaction-Level Modeling (TLM)
  Drivers and monitors
  Scoreboards and self-checking mechanisms
  Constraint-random verification
• Functional verification best practices
• Coverage-driven verification

Scripting Languages:

• PERL
• Shell scripting
• Python
• TCL

EDA Tools:

• VCS (Synopsys VCS simulator)
• Veloce (Siemens emulation platform)
• Xcelium (Cadence simulator)

Verification Techniques:

• Chip checklist review and closure
• Coverage analysis and metrics
• Interrupt verification and validation
• Gate-level simulation
• X-propagation analysis
• Assertion-based verification
• Register verification

Additional Skills:

• Board bring-up experience
• Emulation and simulation acceleration (preferred)
• Protocol verification (PCIe, AXI, Ethernet)
• Debugging complex hardware issues

PREFERRED QUALIFICATIONS:

• Experience with emulation/simulation acceleration platforms
• Knowledge of Ethernet switch architecture and protocols
• Experience with CPU management and system fabric architectures
• Familiarity with PCIe, AXI, MDIO, and I2C protocols
• Experience with DMA engine verification
• Knowledge of interrupt handling and prioritization schemes
• Experience with formal verification techniques
• Background in hardware-software co-verification
• Experience with version control systems (Git, SVN)
• Familiarity with agile development methodologies

CORE COMPETENCIES

• Strong analytical and problem-solving skills
• Excellent attention to detail
• Ability to work independently and as part of a team
• Strong communication and documentation skills
• Ability to manage multiple priorities and meet deadlines
• Self-motivated and proactive approach to learning
• Experience with complex system-level verification
• Ability to mentor junior engineers
• Strong debugging and root-cause analysis skills

EDUCATION:

• Bachelor's degree in Electrical Engineering, Computer Engineering,
  Computer Science, or related field
• Master's degree preferred

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.