招聘
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell Data Centre Engineering (DCE) - Compute & Storage (CCS) BU has been at the forefront of developing and delivering leading-edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast‐growing product lines, Marvell technology is powering the next‐generation data processing and workload acceleration platforms for the Carrier, Cloud/Enterprise and Automotive Compute market segments. The team focusses on the Custom ASIC business, Cloud AI solutions & Enterprise/Career solutions including the CXL product line.
What You Can Expect
- Contribute to the design verification of complex CPU sub-systems and the full chip.
- Hands-on work on a test bench architecture, test bench development, test plan, and coverage plan is needed.
- Mentor and guide a team of design verification engineers.
- Own the subsystem verification flows, methodologies, and verification of IP/subsystem—conclude with the required verification criteria.
What We're Looking For
- Bachelor’s degree in computer science, electrical engineering, or related fields and 5+ years of related professional experience.
- Master’s degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 3+ years of experience.
- Experience with processors and SOC understanding, such as interrupt controllers & Arm CPU sub-systems, is an added advantage.
- Experience with digital design verification at the SoC level.
- Proven track record in ASIC verification, from environment development to test development
- Candidates should have hands-on verification experience and proficiency using System Verilog and UVM.
- Should have experience in the constrained-random stimulus and use of functional coverage.
- Exposure to the C language is preferred.
- Strong debug skills and experience with debug tools such as Verdi and Incisive.
- Good knowledge of AMBA protocols—AXI, AHB, APB
- Creating a test bench, test plan, and coverage plan from scratch by hand on at least one complex project.
- Knowledge of the GIT version control system.
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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关于Marvell

Marvell
PublicMarvell Technology, Inc. is an American company, headquartered in Santa Clara, California, which develops and produces semiconductors and related technology.
5,001-10,000
员工数
Santa Clara
总部位置
$15.2B
企业估值
评价
3.6
10条评价
工作生活平衡
3.2
薪酬
3.8
企业文化
3.5
职业发展
2.8
管理层
2.9
62%
推荐给朋友
优点
Good benefits and compensation
Supportive team and leadership
Flexible work arrangements
缺点
Limited career advancement opportunities
High workload and long hours
Poor management communication
薪资范围
16个数据点
Junior/L3
Junior/L3 · DATA SCIENCE AND ENGINEERING PROFESSIONAL II
1份报告
$111,800
年薪总额
基本工资
$86,000
股票
-
奖金
-
$111,800
$111,800
面试经验
1次面试
难度
3.0
/ 5
时长
14-28周
录用率
100%
体验
正面 100%
中性 0%
负面 0%
面试流程
1
Application Review
2
Recruiter Call
3
Technical Screen
4
Final Round Interview
5
Offer Decision
常见问题
Technical Knowledge
System Design
Behavioral/STAR
Past Experience
UI/UX Design Principles
新闻动态
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