
Leading company in the technology industry
Analog IC Design Intern - Master's Degree
福利厚生
•健康保険
必須スキル
Adobe Creative Suite
Sketch
InVision
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Central Engineering AMS-IP team provides leading-edge solutions for Ser Des PHY and other Analog Mixed-Signal IPs to support all Marvell products.
What You Can Expect
Analog design engineer responsible for the design, verification, and evaluation of Ser Des circuits in high-speed data communication ICs. The responsibilities include but not limited to:
- High-speed and high-performance Analog Ser Des development in advanced technology nodes, 5nm, 3nm and beyond
- Participate in Ser Des design verification across different application and PVT
- Provide the instructions to the layout engineers
What We're Looking For
This position is eligible for 2026 RDSS (Research and Development Substitute Services) program. Please confirm your eligibility with local district office if you are interested in applying for this role. Candidates who are not eligible for 2026 RDSS are still also welcomed!
- Candidate MUST be currently pursuing a MS/PHD degree in CS/EE or related technical fields
- Good personal communication skills and team working spirit
- Hardworking and motivated to be part of a highly competent design team
- Familiar with CAD tools for simulations and layouts
- Must be proficient in the one of following skills:
- Fundamental analog circuit design, like Opamp, regulator, Bandgap, ADC, DAC etc.
- High speed SERDES design, like CTLE, Driver, Demux, MUX etc.
- High frequency clock design, like PLL, Clock delivery etc.
Additional Compensation and Benefits
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our Careers page.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
Export Control Notice
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
Equal Opportunity
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
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Marvellについて

Marvell
PublicMarvell Technology, Inc. is an American company, headquartered in Santa Clara, California, which develops and produces semiconductors and related technology.
5,001-10,000
従業員数
Santa Clara
本社所在地
$15.2B
企業価値
レビュー
10件のレビュー
4.0
10件のレビュー
ワークライフバランス
4.2
報酬
3.5
企業文化
4.1
キャリア
3.2
経営陣
3.4
75%
知人への推奨率
良い点
Supportive team and leadership
Good work-life balance and flexibility
Collaborative and inclusive environment
改善点
Management issues and disorganization
Limited career advancement opportunities
High workload and stress
給与レンジ
16件のデータ
Junior/L3
Junior/L3 · DATA SCIENCE AND ENGINEERING PROFESSIONAL II
1件のレポート
$111,800
年収 総額
基本給
$86,000
ストック
-
ボーナス
-
$111,800
$111,800
面接レビュー
レビュー1件
難易度
3.0
/ 5
期間
14-28週間
内定率
100%
体験
ポジティブ 100%
普通 0%
ネガティブ 0%
面接プロセス
1
Application Review
2
Recruiter Call
3
Technical Screen
4
Final Round Interview
5
Offer Decision
よくある質問
Technical Knowledge
System Design
Behavioral/STAR
Past Experience
UI/UX Design Principles
最新情報
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