招聘
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Custom Cloud Solutions (CCS) Hardware Validation Group is responsible for ensuring the quality, reliability, and performance of next generation data center ASIC and SoC products spanning a diverse portfolio that includes cloud infrastructure, AI accelerators, network processors, NICs, custom ASICs, SSD controllers, CXL devices, and domain specific accelerators.
The team owns end to end hardware validation, working across the product lifecycle from early silicon bring up through system level qualification. Our scope includes functional hardware validation, electrical characterization, high speed SERDES validation, and system/platform validation, all executed in advanced, fully instrumented hardware labs. The group validates complex, high performance silicon and platforms across a wide range of critical technologies and interfaces, including Memory Subsystems (DDR, HBM, memory controllers), High Speed Interconnects (PCIe, Ethernet, CPRI, PAM4/NRZ), D2D interconnects, Storage, and IO (Flash and NVME, SSD controllers, USB) and System and Platform testing.
What You Can Expect:
- Lead system bring‑up, validation, and debug activities for platforms utilizing PCIe, CXL and other high‑speed interfaces.
- Analyze and resolve complex hardware, firmware, and protocol‑level issues, performing detailed root‑cause analysis and proposing effective corrective actions.
- Develop and maintain firmware (C programming) to support system initialization, feature enablement, validation, and debug.
- Work extensively with PCIe and CXL protocol architecture and electrical standards, including clocking, reset sequencing, power management, equalization, and speed changes.
- Support and debug physical and protocol layers (PIPE interface, PCS, MAC) of PCIe and other high‑speed interfaces.
- Utilize PCIe exercisers, analyzers, and jammers to validate functionality, performance, and compliance.
- Operate standard lab equipment, including logic analyzers and oscilloscopes, to perform signal integrity analysis and system debugging.
- Write and maintain automation scripts (Python or similar) to streamline silicon testing, validation flows, and lab automation.
- Collaborate closely with architecture, design, firmware, validation, and product engineering teams to ensure seamless integration and issue resolution.
- Document findings, test results, and debug methodologies, and communicate clearly with internal stakeholders.
- Contribute to continuous improvement of validation methodologies, debug processes, and lab infrastructure.
- Demonstrate flexibility and initiative to take ownership of technical challenges in a dynamic development environment.
What We're Looking For:
- Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 5–15 years of relevant industry experience; or Master’s degree and/or PhD in Computer Science, Electrical Engineering, or a related discipline with 3–10 years of professional experience.
- Strong understanding of PCIe and CXL protocol, architecture, and electrical standards, including clocking architectures, reset schemes, power management, speed change mechanisms, and equalization techniques.
- Hands-on experience with PCIe Gen6 and PAM4 SERDES is highly desirable.
- Extensive knowledge of physical and protocol layers—including PIPE interface, PCS, and MAC—for one or more common high‑speed interfaces.
- Proven experience in system bring-up, validation, and debug, with strong root-cause analysis capabilities.
- Experience developing firmware in C to support system bring-up, validation, and debug activities.
- Proficient in using PCIe exercisers, analyzers, and jammers for validation and debugging.
- Comfortable working with standard lab equipment, including logic analyzers and oscilloscopes.
- Experience writing automation scripts (Python or similar languages) for silicon testing and lab automation.
- Strong communication skills in English, both written and verbal.
- Demonstrated ability to be flexible, proactive, and collaborative, with a strong aptitude for working effectively in a team environment.
Expected Base Pay Range (USD)
127,630 - 191,200, $ per annum
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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关于Marvell

Marvell
PublicMarvell Technology, Inc. is an American company, headquartered in Santa Clara, California, which develops and produces semiconductors and related technology.
5,001-10,000
员工数
Santa Clara
总部位置
$15.2B
企业估值
评价
3.6
10条评价
工作生活平衡
3.2
薪酬
3.8
企业文化
3.5
职业发展
2.8
管理层
2.9
65%
推荐给朋友
优点
Good benefits and compensation
Supportive team and leadership
Flexible work arrangements
缺点
Limited career advancement opportunities
High workload and long hours
Poor management and communication
薪资范围
16个数据点
Junior/L3
Junior/L3 · DATA SCIENCE AND ENGINEERING PROFESSIONAL II
1份报告
$111,800
年薪总额
基本工资
$86,000
股票
-
奖金
-
$111,800
$111,800
面试经验
1次面试
难度
4.0
/ 5
时长
14-28周
录用率
100%
体验
正面 100%
中性 0%
负面 0%
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Technical Interview
5
Final Round/Onsite
6
Offer
常见问题
Technical Knowledge
System Design
Behavioral/STAR
Past Experience
UI/Frontend Architecture
新闻动态
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