招聘
Job Details:
Job Description:
The Advanced Packaging Technology Development Substrate and Wafer Assembly (APTD: S and WA) team develops and delivers advanced substrate packaging and wafer assembly solutions for customers. As part of the Substrate Technology Integration Group, within APTD, you will play a pivotal role in shaping the future of advanced packaging. In this role, you will:
- Work at the forefront of packaging technologies essential for next-generation AI devices.
- Collaborate with substrate suppliers worldwide to drive innovation and scalability.
- Contribute to the deployment of EMIB-T, our next-generation advanced packaging substrate technology, enabling heterogeneous chip architectures.
- Lead efforts to qualify new capacity at advanced packaging suppliers, ensuring timely readiness to meet growing customer demand. We are seeking highly motivated professionals with strong technical expertise who thrive on solving complex challenges, challenge conventional approaches, and build lasting supplier partnerships.
Note: This position requires regular onsite presence to fulfil essential responsibilities.
Key Responsibilities:
-
Collaborate closely with on-site supplier engineering teams and the US integration team to advance substrate building block technologies and manage critical process interactions.
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Monitor, optimize, and improve capacity in bottleneck processes by implementing strategies that reduce throughput time (TPT).
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Oversee schedules for product and test vehicle (TV) deliveries, proactively resolving issues to achieve aggressive on-time delivery (OTD) targets.
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Conduct thorough analysis of substrate lead times, develop reduction roadmaps, and consistently meet quarterly lead time goals.
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Ensure strict adherence to Process Control System (PCS) commitments by suppliers.
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Partner with internal teams to design and execute new factory TV/product certification plans focused on yield improvement.
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Develop and maintain detailed micro-schedules for new factory startups, including milestone tracking to ensure supplier compliance with startup timelines.
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Lead qualification activities and monitor ramp indicators to guarantee smooth, incident-free production ramp-up of new capacity.
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Influence strategic decision-making at senior supplier management levels.
Work Environment:
- Regular travel to supplier sites and onsite presence at factories (minimum three days per week).
- Collaboration with diverse teams across Asia and the US.
- Flexibility to adapt to evolving project scopes and dynamic business needs.
Qualifications:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
- Bachelor's or Master's degree with 8+ years, or PhD with 4+ years work experience, in Science or Engineering.
- 6+ years of experience in fab back-end or substrate manufacturing process development.
Preferred Qualifications:
- Experience in capacity management, lead time analysis, yield improvement, structured problem solving, situational leadership, supplier influence, and stakeholder management.
- Strong understanding of substrate process building blocks such as component embedding, laser drilling, dielectric lamination, lithography, multi-metal electrolytic plating, defect inspection/metrology, and electrical testing.
- Experience qualifying /owning process tools in a TD/ramp or HVM context is desired.
- Hands-on experience in factory operations, substrates, manufacturing, process engineering, and yield improvement is highly preferred.
- Fluent business-level English communication skills, excellent presentation abilities, and capability to engage effectively with supplier executive management.
Job Type:
Experienced Hire
Shift:
Shift 1 (Japan)
Primary Location:
Japan, Tokyo
Additional Locations:
Business group:
Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.
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关于Intel

Intel
PublicIntel Corporation is an American multinational technology company headquartered in Santa Clara, California. It designs, manufactures, and sells computer components such as central processing units (CPUs) and related products for business and consumer markets.
120,000+
员工数
Santa Clara
总部位置
$200B
企业估值
评价
3.4
10条评价
工作生活平衡
2.5
薪酬
4.0
企业文化
3.5
职业发展
3.0
管理层
2.5
65%
推荐给朋友
优点
Good benefits and compensation
Innovative technology and projects
Collaborative supportive environment
缺点
Work-life balance challenges and long hours
Management issues and disorganization
High-pressure stressful environment
薪资范围
18个数据点
C-Suite
Mid/L4
Principal/L7
Senior/L5
Staff/L6
VP
Director
C-Suite · Product Manager Grade 11
0份报告
$596,632
年 薪总额
基本工资
-
股票
-
奖金
-
$506,637
$686,627
面试经验
2次面试
难度
3.0
/ 5
时长
14-28周
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
常见问题
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
System Design
Past Experience
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