
Intel inside.
Pre-Silicon Verification Engineer (AI Accelerator)
Job Details:
Job Description:
The Intel NPU IP team is looking for a Digital Verification Engineer to work on the validation of NPU AI accelerator products. In this role you will join the NPU Hardware Pre-Silicon Validation team working closely with verification engineers, design engineers and AI architects to validate components of the NPU IP portfolio. In particular we are interested in hiring engineers with experience in formal verification methodologies and assertion-based verification using System Verilog Assertions (SVA) Your responsibilities will include:
- Functional and/or Formal Verification of complex digital design block(s) on the latest generations of Intel's NPU AI accelerators.
- Development and implementation of verification environments from initial planning through the validation lifecycle to review and signoff.
- Development of test plans and test cases • Implementation of random test generators, high level transactional models, bus functional models (BFMs), functional/formal constraints, checkers and scoreboards, coverpoints/covergroups and SVA properties Leixlip is the primary location for this position, however, we offer some flexibility to support your work/life balance arrangements. The team is looking for digital verification engineers across a range of experience levels who have pre-silicon verification skills, although experience in adjacent engineering disciplines such as software development would also be considered.
Qualifications:
Qualifications:
- Graduate in Electronic and Computer Engineering, Computer Science or a related field.
- Multiple years of industry experience in pre-silicon validation for ASIC, SoC, or FPGA designs.
- Experience with industry standard verification tools and methodologies
- Expertise in developing testbenches, test plans, and functional/formal verification environments.
- A self-starter with good communication skills
- Proven ability to collaborate in diverse team environments and take on leadership roles.
- Strong problem-solving skills and ability to adapt to a fast-paced, innovative environment. Preferred Knowledge
- Proficiency in System Verilog and System Verilog Assertions.
- Experience with formal verification techniques and tools
- Experience with UVM simulation based validation
- Knowledge of SoC based CPUs, No Cs, AMBA protocols, and memory controllers.
- Knowledge of programming languages such as C, C++, Python, Shell scripting and TCL.
Job Type:
Experienced Hire
Shift:
Shift 1 (Ireland)
Primary Location:
Ireland, Leixlip
Additional Locations:
Business group:
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.
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Intelについて

Intel
PublicIntel Corporation is an American multinational technology company headquartered in Santa Clara, California. It designs, manufactures, and sells computer components such as central processing units (CPUs) and related products for business and consumer markets.
120,000+
従業員数
Santa Clara
本社所在地
$200B
企業価値
レビュー
10件のレビュー
3.4
10件のレビュー
ワークライフバランス
2.5
報酬
4.0
企業文化
3.5
キャリア
3.0
経営陣
2.5
65%
知人への推奨率
良い点
Good benefits and compensation
Innovative technology and projects
Collaborative supportive environment
改善点
Work-life balance challenges and long hours
Management issues and disorganization
High-pressure stressful environment
給与レンジ
18件のデータ
Senior/L5
Senior/L5 · Advanced Field Service Engineering Data Analyst
1件のレポート
$132,904
年収 総額
基本給
$102,234
ストック
-
ボーナス
-
$132,904
$132,904
面接レビュー
レビュー2件
難易度
3.0
/ 5
期間
14-28週間
面接プロセス
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
よくある質問
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
System Design
Past Experience
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