
Intel inside.
CPU Circuit Design Lead at Intel
About the role
Job Details:
Job Description:
You will be part of ACE India , in the P- Core design team driving Intel's latest CPU's in the latest process technology. In this position, you will be responsible for leading the design analysis and methodologies of the different types of memory blocks and data path subsystems. Your responsibilities will include but not limited to: 1. Responsible for methodology enablement for memory blocks to meet over 5GHz Freq and low-power digital designs with optimal area. 2. In depth understanding of different memory design concepts ((SRAM/RF/ROM). 3. Expertise in Static timing analysis concepts. 4. Close work with Layout and Floor planning teams. 5. Back-end design implementation of new features. 6. Expertise in Memory post silicon analysis. 7. Good understanding of statistical variation.
Qualifications:
You must possess a Masters Degree in Electrical or Computer Engineering with atleast 8 or more years of experience in related field or a Bachelors Degree with atleast 10 years of experience. Technical Expertise in synthesis, P and R tools preferred. Preferred Qualifications: 1. Digital Design Experience, with High Speed, Low Power. 2. Familiarity with Verilog. 3. Tcl, Perl, Python scripting. 4. Good understanding of spice simulations and analysis 5. Strong verbal and written communication skills.
Job Type:
Experienced Hire
Shift:
Shift 1 (India)
Primary Location:
India, Bangalore
Additional Locations:
Business group:
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Required skills
circuit design
SRAM
ROM
register files
static timing analysis
digital design
post-silicon analysis
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About Intel

Intel
PublicIntel Corporation is an American multinational technology company headquartered in Santa Clara, California. It designs, manufactures, and sells computer components such as central processing units (CPUs) and related products for business and consumer markets.
120,000+
Employees
Santa Clara
Headquarters
$200B
Valuation
Reviews
10 reviews
3.4
10 reviews
Work-life balance
2.5
Compensation
4.0
Culture
3.5
Career
3.0
Management
2.5
65%
Recommend to a friend
Pros
Good benefits and compensation
Innovative technology and projects
Collaborative supportive environment
Cons
Work-life balance challenges and long hours
Management issues and disorganization
High-pressure stressful environment
Salary Ranges
18 data points
Senior/L5
Senior/L5 · Advanced Field Service Engineering Data Analyst
1 reports
$132,904
total per year
Base
$102,234
Stock
-
Bonus
-
$132,904
$132,904
Interview experience
2 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Interview process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
Common questions
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
System Design
Past Experience
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