招聘
Job Details:
Job Description:
This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.
We are seeking a motivated and detail‑oriented Signal Integrity Intern to support the design, development, and validation of platform hardware and board‑level solutions. In this role, you will assist with board development activities, including component evaluation, PCB layout reviews, and electrical analysis, while collaborating closely with cross‑functional teams. This internship provides hands‑on exposure to real-world hardware engineering challenges and an opportunity to apply academic knowledge to projects that support Intel’s business objectives in a highly collaborative environment.
Key Responsibilities
- Support the design and development of platform hardware and printed circuit boards (PCBs), including evaluation of board components.
- Assist with PCB layout activities, ensuring signal integrity, power integrity, and compliance with electrical design guidelines.
- Participate in board bring-up and debug activities, including lab measurements, issue identification, and resolution support.
- Collaborate with cross-functional teams (signal integrity, power integrity, mechanical, thermal, manufacturing, and validation) to meet system-level requirements.
- Apply signal integrity and hardware design principles to help optimize performance, reliability, manufacturability, and cost.
- Support documentation of design decisions, test results, and debug findings.
- Learn and apply engineering best practices while contributing to projects that align with Intel’s hardware development roadmap and business goals.
What You Will Learn
- Fundamentals of signal integrity and board-level hardware design.
- Exposure to high-speed interfaces, PCB materials, stack-ups, and layout constraints.
- Hands-on experience with board bring-up, lab equipment, and debug methodologies.
- How electrical, thermal, and mechanical requirements are balanced in platform design.
- Collaboration within a cross-disciplinary engineering environment.
- Insight into Intel’s end-to-end hardware development lifecycle and career paths in hardware engineering.
Qualifications:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications:
- Pursuing a Bachelor's, Master's degree in Electrical Engineering, Electronics, Computer Science, Mathematics, Physics, or related STEM field (at least 1 year remaining as an active student)
- 3+ months of experience in scripting or programming.
- Advance English level.
- Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).
Preferred Qualifications:
- Transmission lines theory knowledge.
- Electrical Circuits knowledge.
- Familiarity with fundamental concepts in Electromagnetism (modeling).
- Programming in MATLAB, scripting for analysis, and post-processing of data.
- Experience with electrical circuits and full-wave electromagnetic simulation tools.
A candidate who accepts an offer of employment in Mexico is required to present their own personal identification information and numbers for the following: Mexican Security Number (NSS), Tax Identification Number (RFC) and CURP identification number.
Job Type:
Student / Intern
Shift:
Shift 1 (Mexico)
Primary Location:
Mexico, Guadalajara
Additional Locations:
Business group:
At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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About Intel

Intel
PublicIntel inside.
120,000+
Employees
Santa Clara
Headquarters
$200B
Valuation
Reviews
3.5
3 reviews
Work Life Balance
3.0
Compensation
3.0
Culture
2.5
Career
2.5
Management
2.0
25%
Recommend to a Friend
Pros
Offers internship opportunities
Interview opportunities available
Cons
Major job cuts and layoffs
Spam emails after rejection
Poor communication practices
Salary Ranges
6 data points
Senior/L5
Senior/L5 · Advanced Field Service Engineering Data Analyst
1 reports
$132,904
total / year
Base
$102,234
Stock
-
Bonus
-
$132,904
$132,904
Interview Experience
2 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
Common Questions
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
System Design
Past Experience
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