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求人Intel

CPU Pre-Silicon Verification Engineer

Intel

CPU Pre-Silicon Verification Engineer

Intel

Mexico, Guadalajara

·

On-site

·

Full-time

·

1mo ago

Job Details:

Job Description:

This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.

We are seeking a highly motivated and experienced Senior CPU Pre-Silicon Verification Engineer to join our advanced CPU verification team. In this role, you will be responsible for ensuring the functional correctness and robustness of CPU logic designs through state‑of‑the‑art pre‑silicon verification methodologies. You will work closely with microarchitecture, design, and post‑silicon teams to help deliver high‑performance, power‑efficient, and reliable CPU IP.

Key Responsibilities:

  • Lead and execute pre‑silicon functional verification of complex CPU microarchitecture blocks and top‑level subsystems, ensuring correctness against architectural and microarchitectural specifications.
  • Develop, own, and maintain comprehensive verification and test plans, including corner cases, stress scenarios, and detailed coverage goals.
  • Architect, build, and enhance scalable UVM‑based (or similar) constrained‑random verification environments, including reusable testbenches, agents, sequences, checkers, and scoreboards.
  • Define and implement advanced functional, code, and assertion coverage models, driving systematic coverage‑driven closure.
  • Implement high‑quality stimulus and assertion‑based verification (SVA) to validate complex logic behaviors and corner‑case interactions.
  • Execute block‑level and system‑level simulations to uncover design bugs, integration issues, and functional inconsistencies.
  • Debug complex RTL and testbench failures, performing thorough root‑cause analysis using simulation tools, waveforms, formal methods, and collaboration with designers.
  • Work closely with CPU architects and RTL designers to validate intricate architectural and microarchitectural features, review specifications, identify verification risks, and propose design or methodology improvements.
  • Drive technical reviews and document verification strategies, methodologies, and results, ensuring alignment across architecture, design, and verification teams.
  • Enhance verification infrastructure and methodologies, enabling higher automation, scalability, and productivity across the team.
  • Mentor junior engineers and contribute to best‑practice development, methodology refinement, and tool‑flow improvements.
  • Support related activities, including performance modeling, formal verification, emulation, and prototyping, as needed for overall CPU validation.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Bachelor's degree or higher in Electrical/Electronic Engineering or Computer Engineering 5+ years or Master's degree with 3+ years.
  • Experience should be in the following areas:Digital logic design, including instruction set execution, ALUs, control units, registers, memory, and system buses.
  • At least one scripting language (e.g., Python, Perl, or Tcl), C++, and System Verilog.
  • Analytical and debugging skills, with a creative approach to problem-solving.
  • Advanced English level.
  • Must have unrestricted - permanent right to work in Mexico

Preferred Qualifications:

  • Synopsys simulators.
  • Hands-on experience developing UVM-based testbenches for reusable and scalable verification environments.
  • Define and implement validation strategies based on architectural and design insights.

Job Type:

Experienced Hire

Shift:

Shift 1 (Mexico)

Primary Location:

Mexico, Guadalajara

Additional Locations:

Business group:

The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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Intelについて

Intel

Intel

Public

Intel Corporation is an American multinational technology company headquartered in Santa Clara, California. It designs, manufactures, and sells computer components such as central processing units (CPUs) and related products for business and consumer markets.

120,000+

従業員数

Santa Clara

本社所在地

$200B

企業価値

レビュー

3.4

10件のレビュー

ワークライフバランス

2.5

報酬

4.0

企業文化

3.5

キャリア

3.0

経営陣

2.5

65%

友人に勧める

良い点

Good benefits and compensation

Innovative technology and projects

Collaborative supportive environment

改善点

Work-life balance challenges and long hours

Management issues and disorganization

High-pressure stressful environment

給与レンジ

18件のデータ

Senior/L5

Senior/L5 · Advanced Field Service Engineering Data Analyst

1件のレポート

$132,904

年収総額

基本給

$102,234

ストック

-

ボーナス

-

$132,904

$132,904

面接体験

2件の面接

難易度

3.0

/ 5

期間

14-28週間

面接プロセス

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Onsite/Virtual Interviews

5

Team Matching

6

Offer

よくある質問

Coding/Algorithm

Technical Knowledge

Behavioral/STAR

System Design

Past Experience