
Intel inside.
Analog and Mixed Signal Design Engineer
Job Details:
Job Description:
The Group: Intel's Advanced Design Foundational IP Organization (AD-FIP) within Design Technology Platform (DTP) focuses on pathfinding and development of advanced logic, memory, and analog/mixed-signal circuits to enable best-in-class Foundational IP collateral and product design across all generations of Intel process technology. Critical technologies AD-FIP delivers to Intel are Digital and Analog Standard Cell Libraries, Embedded Memory (SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High-speed I/O Reference Designs (DDR, UCIe, PCIe, Ser Des, GPIO), RF and Wireless Circuits (Wave Guide TX, Power Amplifier).
As an analog and mixed-signal IC designer your day-to-day responsibilities will include, but not always be limited to:
- Developing, designing and testing circuit blocks including wireline IO AFEs, clocking circuits, and voltage regulator circuits as well as integrating them into Intel's leading technology test chips.
- Capture of design and measurement results to guide the next generation of process technology and circuit specifications based on requirements for SoC building blocks and critical wireline interfaces.
- Work closely with process and IP engineers to anticipate AMS IP requirements and use design and test results to inform and accelerate process technology and product development.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
- Bachelor’s degree in Electrical, Computer or Electrical and Computer Engineering, or related STEM field with 10+ years of experience, OR
- Master's degree in Electrical, Computer or Electrical and Computer Engineering, or related STEM field with 8+ years of experience, OR
- Ph.D. in Electrical, Computer or Electrical and Computer Engineering, or related STEM field with 3+ years of experience.
The qualifications listed below must meet the required years of experience associated with the candidate’s degree level:
- Experience with design of custom analog or mixed-signal circuits.
- Analog or mixed signal design skills including specification, design or verification.
Preferred Qualifications:
Experience in one or more of the following areas is preferred:
- GPIOs, high speed parallel or serial IO links and their subcomponents (data path, TX, RX, etc.), clock distribution, clock conditioning, clock recovery circuits, voltage regulators, voltage reference circuits, ADCs/DACs, inductors, transmission lines, RF and millimeter-wave circuits, test of custom analog and mixed-signal circuits.
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
US, California, Santa Clara
Business group:
Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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Intelについて

Intel
PublicIntel Corporation is an American multinational technology company headquartered in Santa Clara, California. It designs, manufactures, and sells computer components such as central processing units (CPUs) and related products for business and consumer markets.
120,000+
従業員数
Santa Clara
本社所在地
$200B
企業価値
レビュー
10件のレビュー
3.4
10件のレビュー
ワークライフバランス
2.5
報酬
4.0
企業文化
3.5
キャリア
3.0
経営陣
2.5
65%
知人への推奨率
良い点
Good benefits and compensation
Innovative technology and projects
Collaborative supportive environment
改善点
Work-life balance challenges and long hours
Management issues and disorganization
High-pressure stressful environment
給与レンジ
18件のデータ
Senior/L5
Senior/L5 · Advanced Field Service Engineering Data Analyst
1件のレポート
$132,904
年収 総額
基本給
$102,234
ストック
-
ボーナス
-
$132,904
$132,904
面接レビュー
レビュー2件
難易度
3.0
/ 5
期間
14-28週間
面接プロセス
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
よくある質問
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
System Design
Past Experience
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