
Intel inside.
Pre-Silicon Validation Engineer at Intel
About the role
Job Details:
Job Description:
As a SoC Design Verification Engineer, you will play a pivotal role in ensuring the successful delivery of high-quality integrated System-on-Chip (SoC) designs that meet stringent specifications. Your contributions will directly support Intel's mission to engineer cutting-edge solutions that redefine technology's impact on the world. This role offers the opportunity to collaborate across multidisciplinary teams, driving innovation and solving complex challenges in SoC verification. Your work will be instrumental in shaping Intel's next-generation products, influencing industry trends, and enhancing Intel's reputation for excellence.
Key Responsibilities:
- Define and develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and environments to achieve required coverage levels and confirm adherence to microarchitecture specifications.
- Execute verification plans and system simulation models to analyze power, performance, and design functionality, uncovering and resolving bugs.
- Replicate, root cause, and debug issues in the presilicon environment, implementing corrective measures to address failing tests.
- Collaborate with SoC architects, microarchitects, RTL developers, postsilicon engineers, and physical design teams to enhance verification processes for complex architectural and microarchitectural features.
- Document test plans and lead technical reviews of plans and proofs with design and architecture teams.
- Incorporate security validation activities, including regression and debug tests, ensuring comprehensive security coverage.
- Maintain and refine existing functional verification infrastructure and methodologies, driving continuous improvement.
- Absorb learning from post silicon activities, update test plans for missing coverage, and proliferate improvements to future product designs.
Qualifications:
Minimum Qualifications:
- Bachelor's degree in Electronics Engineering, Computer Engineering, or a related field.
- 10+ years of experience with a Bachelor's degree, 8+ years of experience with a Master's degree, or 7+ years of experience with a PhD.
- Proficiency in System Verilog and Universal Verification Methodology (UVM).
- Proven expertise in verification methodologies and strategies, including directed and random test case development.
- Strong debugging capabilities for SoC, fabric, memory subsystems, and protocols such as PCIe or Ethernet.
- Comprehensive knowledge of microarchitecture concepts and advanced computer architecture.
- Experience in emulation and simulation tools for verification, including power and performance analysis.
Preferred Qualifications:
- Exposure to SoC architectures, cache coherency protocols (e.g., CHI, IDI, UXI), and high-speed I/O subsystems.
- Familiarity with AMBA protocols and debugging tools. Exposure to DSP algorithms and validation methods using MATLAB model
- Experience in security validation flows, boot flows, fuse controllers, reset and clock validation.
- Knowledge of IP/Subsystem/SoC-level verification and coverage closure.
- Excellent teamwork, communication, and problem-solving skills.
- Enthusiasm to lead technical innovation, contributing to Intel's world-class product development. We invite you to become part of Intel's journey to redefine technological excellence. Apply today to make a lasting impact on the future of innovation.
Job Type:
Experienced Hire
Shift:
Shift 1 (India)
Primary Location:
India, Bangalore
Additional Locations:
Business group:
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Required skills
SoC verification
UVM
SystemVerilog
Debugging
Functional coverage
Simulation
Microarchitecture
Test planning
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About Intel

Intel
PublicIntel Corporation is an American multinational technology company headquartered in Santa Clara, California. It designs, manufactures, and sells computer components such as central processing units (CPUs) and related products for business and consumer markets.
120,000+
Employees
Santa Clara
Headquarters
$200B
Valuation
Reviews
10 reviews
3.4
10 reviews
Work-life balance
2.5
Compensation
4.0
Culture
3.5
Career
3.0
Management
2.5
65%
Recommend to a friend
Pros
Good benefits and compensation
Innovative technology and projects
Collaborative supportive environment
Cons
Work-life balance challenges and long hours
Management issues and disorganization
High-pressure stressful environment
Salary Ranges
18 data points
Senior/L5
Senior/L5 · Advanced Field Service Engineering Data Analyst
1 reports
$132,904
total per year
Base
$102,234
Stock
-
Bonus
-
$132,904
$132,904
Interview experience
2 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Interview process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
Common questions
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
System Design
Past Experience
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