招聘
ASIC Design Manager:
This role has been designed as ‘Hybrid’ with an expectation that you will work on average 2 days per week from an HPE office.
Who We Are:
Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.
Job Description:
Overview
Role focuses on advanced silicon, block and system level ASIC/SoC design and development. Responsibilities include designing, developing, analyzing, troubleshooting, and debugging complex ASIC and SoC architectures, RTL implementations, and integration flows. Supports development of products, services, and solutions within HPE’s networking portfolio. Requires strong expertise in hardware design engineering disciplines, methodologies, and tools—including System Verilog RTL development, microarchitecture design, integration, synthesis, and silicon implementation flows.
Leads and mentors a team of ASIC design engineers responsible for developing RTL, driving microarchitecture implementation, and ensuring high quality silicon design and integration. Partners closely with architects, verification leads, and cross functional teams to align design execution with product architecture and program goals.
Management Level Definition:
Applies advanced subject matter knowledge to manage staff activities in solving common and complex business/technical issues within established policies. Manages exempt individual contributors and/or supervisors. Has accountability for results of a major program in terms of cost, direction and people management. Provides guidance on process improvements and recommends changes in alignment with business tactics and strategy for area of responsibility. Plans, manages and monitors operational/tactical activities of Staff. Staff members' work may involve strategic issues. Recruits and supports development of direct staff members. Typically reports to MG2 or Director.
Responsibilities
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Leads a team of ASIC design engineers focused on block and subsystem implementation using System Verilog RTL and modern ASIC design flows
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Drives development and implementation of microarchitecture and RTL designs aligned with product architecture and performance goals
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Creates design plans, schedules, milestones, and priorities based on product architecture and program needs
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Ensures high quality RTL implementation, including functional correctness, performance, power efficiency, and design robustness
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Oversees block integration and subsystem development, ensuring alignment across design, verification, and system architecture
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Works closely with verification teams to support verification planning, debug, and coverage closure
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Manages team execution, schedules, deliverables, and continuous improvement in design methodologies, automation, and productivity
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Collaborates with architects, verification leads, program management, validation, and system engineering to communicate status and drive issue resolution
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Works with EDA vendors and global development partners to support design tools, synthesis flows, and silicon development infrastructure
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Identifies opportunities for design methodology improvements, flow innovation, and productivity enhancements
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Provides people leadership including hiring, mentoring, performance planning, and skill development
Education and Experience Required
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Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent; advanced degree preferred
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Typically 7–10 years of ASIC/SoC design and development experience
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2–5+ years of people management or technical leadership in ASIC design or silicon development
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Strong hands on expertise in System Verilog RTL development, microarchitecture design, and ASIC implementation flows
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Experience with ASIC integration, synthesis, timing closure, and design debugging
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Networking experience is desirable
Knowledge and Skills
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Strong leadership and team building skills with ability to guide senior technical contributors
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Deep knowledge of ASIC/SoC design methodologies, microarchitecture development, RTL coding practices, and integration flows
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Solid understanding of silicon development flows from architecture definition through tape out and post silicon bring up
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Experience collaborating closely with verification, physical design, and system teams
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Strong organizational and planning skills with ability to manage schedules and priorities
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Ability to work effectively with geographically distributed teams and external partners
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Excellent communication skills for technical and cross functional audiences
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Strong problem solving skills and ability to influence design strategy and execution
Additional Skills:
Accountability, Accountability, Action Planning, Active Learning, Active Listening, Agile Methodology, Agile Scrum Development, Analytical Thinking, Bias, Coaching, Creativity, Critical Thinking, Cross-Functional Teamwork, Data Analysis Management, Data Collection Management (Inactive), Data Controls, Design, Design Thinking, Empathy, Follow-Through, Group Problem Solving, Growth Mindset, Intellectual Curiosity (Inactive), Long Term Planning, Managing Ambiguity {+ 5 more}
What We Can Offer You:
Health & Wellbeing
We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.
Personal & Professional Development
We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.
Unconditional Inclusion
We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.
Let's Stay Connected:
Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE.
#unitedstates
Job:
Engineering
Job Level:
Manager_1
"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. – United States of America: Annual Salary USD 153,500 - 310,500 in California
The listed salary range reflects base salary. Variable incentives may also be offered."
Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html
HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity.
Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.
HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.
No Fees Notice & Recruitment Fraud Disclaimer
It has come to HPE’s attention that there has been an increase in recruitment fraud whereby scammer impersonate HPE or HPE-authorized recruiting agencies and offer fake employment opportunities to candidates. These scammers often seek to obtain personal information or money from candidates.
Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors **will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.**The credentials of any hiring agency that claims to be working with HPE for recruitment of talent should be verified by candidates and candidates shall be solely responsible to conduct such verification. Any candidate/individual who relies on the erroneous representations made by fraudulent employment agencies does so at their own risk, and HPE disclaims liability for any damages or claims that may result from any such communication.
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关于HPE

HPE
PublicHewlett Packard Enterprise provides enterprise-focused technology solutions including servers, storage, networking, and cloud services. The company was spun off from HP Inc. in 2015 to focus on business and government customers.
10,001+
员工数
Spring
总部位置
$22B
企业估值
评价
3.5
10条评价
工作生活平衡
4.2
薪酬
2.8
企业文化
3.6
职业发展
3.1
管理层
3.4
65%
推荐给朋友
优点
Great benefits
Good work-life balance and flexibility
Friendly culture and good team members
缺点
Frequent layoffs
Below industry standard pay and no adequate raises
Unclear company strategy and direction
薪资范围
3个数据点
Junior/L3
Senior/L5
Junior/L3 · Strategic PM
1份报告
-
年薪总额
基本工资
-
股票
-
奖金
-
面试经验
4次面试
难度
3.0
/ 5
录用率
25%
体验
正面 25%
中性 75%
负面 0%
面试流程
1
Application Review
2
Recruiter/Phone Screen
3
Technical Interview
4
Behavioral Interview
5
Online Assessment
6
Offer
常见问题
Coding/Algorithm
Behavioral/STAR
Technical Knowledge
Past Experience
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