HCL Technologies
HCL Technologies

Senior Group Technical Architect - SoC, Verilog, UVM, C, C++

RoleEmbedded
LevelSenior
LocationUnited States
WorkOn-site
TypeFull-time
Posted1 month ago
Apply now

About the role

Job Summary

This role is accountable for overseeing the technical execution of silicon platform validation projects, applying deep expertise in Python scripting to enable rigorous test automation and validation workflows. The individual ensures quality deliverables by guiding team members in validation best practices, optimizing processes, and supporting effective technology adoption within the team environment.

Key Responsibilities

  1. Provide technical guidance in silicon platform validation by implementing Python-based test automation frameworks, ensuring adherence to industry standards and best practices.

  2. Develop, maintain, and enhance validation scripts and tools in Python to support comprehensive functional and performance testing of silicon platforms.

  3. Guide team members on the use of validation methodologies and Python tools, fostering technical growth and improved productivity.

  4. Ensure process compliance within the silicon validation module by enforcing test protocols and leveraging Python for data analysis and reporting.

  5. Participate in technical discussions and reviews as a validation consultant, contributing to feasibility studies and identifying optimal validation approaches using Python and relevant platforms.

  6. Prepare and submit detailed project status and risk reports, utilizing Python-driven analytics to minimize project exposure and support timely escalation closure.

Skill Requirements

  1. Solid proficiency in silicon platform validation strategies, including functional and performance testing.

  2. In-depth knowledge of Python programming for test automation, data analysis, and tool development.

  3. Experience with industry-standard validation tools and environments (e.g., JTAG, PCIe, UART, oscilloscopes, logic analyzers).

  4. Strong understanding of process compliance, quality standards, and documentation in silicon validation.

  5. Ability to analyze validation requirements, break down tasks, and estimate effort using Python-based solutions.

  6. Experience participating in technical discussions and reviews within the team.

Other Requirements

  1. Optional but valuable: ISTQB Certified Tester (Foundation Level), Python Institute PCAP Certification.

Required skills

SoC

Verilog

UVM

C

C++

About HCL Technologies

Others

Headquarters