Senior Technical Architect - SoC, Verilog, UVM, C, C++

Job Summary

This role drives strategic direction and realization of enterprise-grade solutions, ensuring the highest standards of design excellence and business impact within the RTL Design domain. The individual steers large-scale transformation initiatives, orchestrates advanced technology integration, and fosters a culture of innovation and accountability to align technical delivery with corporate objectives.

Key Responsibilities

1. Lead strategic RTL Design initiatives by architecting complex solutions with Verilog, VHDL, and System Verilog, ensuring alignment with enterprise goals and measurable business outcomes.

2. Establish governance and quality frameworks for RTL Design projects, utilizing advanced simulation and synthesis tools such as Synopsys Design Compiler and Cadence Genus to mitigate risk and uphold compliance.

3. Define and execute solution roadmaps that integrate emerging RTL optimization techniques, driving innovation and scalability for enterprise-wide deployments.

4. Oversee multi-disciplinary teams in delivering high-impact RTL Design solutions, mentoring senior technical staff and embedding best practices in digital design and verification.

5. Collaborate with executive stakeholders and clients to identify strategic opportunities for RTL-based differentiation, leveraging industry trends and advanced design methodologies.

6. Manage large-scale RTL programs, coordinating resource allocation and budget oversight to ensure timely, cost-effective delivery and operational risk management.

7. Integrate advanced hardware technologies and IP cores within RTL architectures to support business transformation and future-readiness.

Skill Requirements

1. RTL Design: Enterprise Strategy and Visionary Leadership in Verilog, VHDL, System Verilog.

2. Solid expertise in RTL synthesis, simulation, timing analysis, and optimization.

3. Advanced proficiency in EDA tools such as Synopsys Design Compiler, Cadence Genus, and Mentor Graphics Questa.

4. Excellent understanding of digital architecture, SoC integration, and hardware/software co-design.

5. Strategic knowledge of design verification, low-power design, and advanced technology nodes.

6. Strong leadership in solution governance, risk management, and quality assurance for RTL projects.

Other Requirements

1. Optional but valuable: Certified Design Engineer (CDE), Synopsys Certified Implementation Specialist, Cadence Digital Design Certification.