About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a Silicon CAD Engineer, you will collaborate closely with domain experts in various aspects of silicon development to architect, design, code, and test projects that will have immediate impact on chips powering the next generation of Google Cloud systems. You will work well both separately and as part of a team.

In this role, you will work with CI2 Silicon Development teams and your peers in the Infrastructure, Tools, and Methodology team to develop and enhance design tools and design flows that speed the development of CI2's ground-breaking TPU, CPU, and networking chips and enable them to provide generational improvements in performance, power, and cost while enhancing reliability. You will weave your work into the deep tech stack of silicon design, composed of a mix of licensed Electronic Design Automation (EDA) tools, custom tooling, and emergent technologies from GDM and core.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving team behind Google's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Collaborate in or lead projects to identify automation opportunities, analyze potential approaches, develop custom tooling or flows implementing existing first-party/third-party tools, and support deployment of the resulting solutions across global sites.

• Study, diagnose, and review technical issues by collaborating with silicon and software engineers and third-party EDA and IP vendors to analyze the sources of the issues and the impacts on user productivity.

• Develop and review code developed by other team members and users to provide feedback, ensuring best practices are followed.

• Write documents that set new technical directions. Contribute to existing documentation or educational content and adapt content based on product/program updates and user feedback.

• Leverage AI to both speed the development of tools and development flows, providing more natural and higher-efficiency ways for users to interact with developed technologies.

Minimum qualifications

• PhD degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.

• Experience in Verilog, System Verilog, or equivalent hardware description language.

• Experience with scripting for automation (e.g., shell, Python, Perl).

• Experience in one or more of the following: silicon design/verification, FPGA design/verification, or EDA tools.

Preferred qualifications

• 1 year experience coding in one of the following programming languages including but not limited to: C, C++, Python, or Java.

• Experience in one or more of the following: SoC architecture, embedded systems, firmware design.

• Experience in applying AI techniques to software or hardware development.

• Ability to start full-time role in 2026.