Drive system bring up on emulation platforms, debug test failures and simulation/emulation mismatches.

Bring up external I/O interfaces (e.g., PCIe, Memories, SERDES, SPI, JTAG etc.) on the emulation platforms.

Develop and operate tests on the emulators and assist in bring-up processes from prototyping through post-silicon validation.

Contribute to ongoing methodology and automation improvements, constantly evolving and improving emulation efficiency and value.

Create and support emulation models from RTL and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.

Bachelor's degree in Electrical Engineering or a related field.

6 years of industry experience with RTL design (e.g., Verilog or System Verilog) and simulation (e.g., VCS, Incisive or Questa).

Experience with coding or scripting in C, C++, Perl, TCL or Python.

Experience with emulation systems (e.g., Ze Bu, Palladium, Veloce), compilation, debugging, performance and methodology enhancements.