About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
In this role, you will work on custom silicon test chip hardware systems projects to craft solutions for current and future test chips. You will work with silicon and product teams to ensure that goals are met with systems, and you will work with Application-Specific Integrated Circuit/Field-Programmable Gate Array (ASIC/FPGA), firmware, Signal Integrity/Power Integrity (SI/PI), and silicon development teams to ensure proper verification of test chip features.

You will own the requirements, oversee the development, and own the bringup and support of custom test board systems. This includes ensuring proper connectors, debug and access ports, regulators, interfaces, and requisite support hardware is present and operational on the board. You will assist the test chip and silicon validation teams in validating and characterizing test chip features.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Gather system requirements, define architecture, execute hardware design, and perform product validation, while supporting test board design and development for custom silicon test chips.

• Lead the bring up, validation, deployment, and sustainment of hardware solutions.

• Drive system development from concept through delivery.

• Lead debug and root cause analysis of systems.

• Work cross-functionally with Silicon, Hardware, Software, Power, Mechanical, Thermal, Validation, Signal Integrity, Manufacturing, and external vendors.

Minimum qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.

• 2 years of experience working in a hardware design technical environment.

• Experience with test system development in support of silicon validation.

• Experience with electronics principles, circuit design, board bringup and validation.

Preferred qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field.

• Experience with enterprise-class hardware systems design and data center engineering, server, storage, and networking products.

• Experience with custom silicon bringup, validation, and characterization, including the development of automated test systems to drive silicon-to-system success.

• Experience with Field-Programmable Gate Array/Complex Programmable Logic Device (FPGA/CPLD) design and interfacing with other disciplines, including software, signal integrity, thermal, and mechanical.

• Experience in collecting and organizing details to reproduce results and explain the outcomes.

• Experience solving system issues, technical innovation, and leading technical roadmaps.