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Google
Google

Organizing the world's information and making it universally accessible.

Senior CPU RTL Design Engineer

RoleEngineering
LevelSenior
WorkOn-site
TypeFull-time
Posted1 month ago
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About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

  • Contribute to CPU subsystem design, focusing on SoC integration related activities, functional debug and preparation for post-silicon testing.

  • Participate in post-silicon CPU subsystem design activities for mobile devices, focusing on hardware-software integration and validation of CPU features in real silicon.

  • Contribute to CPU subsystem micro-architecture and RTL design, delivering production-quality designs that meet power, performance, and area (PPA) goals for next-generation processors.

  • Develop knowledge in CPU or AI accelerator architecture, design, and debug.

  • Propose and implement performance-enhancing micro-architecture features, working with architects and performance teams to facilitate decision-making.

Minimum qualifications

  • Bachelor's degree in electrical engineering, computer engineering, computer science, a related field, or equivalent practical experience.

  • 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or System Verilog.

  • Experience with silicon validation and hardware debugging for phone/mobile-class application processors.

  • Experience with logic techniques and RTL static checks (e.g., Lint and CDC).

Preferred qualifications

  • Master's degree or PhD in electrical engineering, computer engineering or computer science, with an emphasis on computer architecture.

  • Experience with ARM architecture around debug features.

  • Experience with the advanced microcontroller bus architecture (AMBA) protocol and system-level coherency management.

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About Google

Google

Google

Public

Google specializes in internet-related services and products, including search, advertising, and software.

10,001+

Employees

Mountain View

Headquarters

$1,700B

Valuation

Reviews

10 reviews

4.5

10 reviews

Work-life balance

3.2

Compensation

4.3

Culture

4.1

Career

4.2

Management

3.8

82%

Recommend to a friend

Pros

Great benefits and perks

Innovative and interesting work

Career development and learning opportunities

Cons

High pressure and expectations

Long hours and heavy workload

Fast-paced and overwhelming environment

Salary Ranges

57,503 data points

Mid/L4

Mid/L4 · Accessibility Analyst

1 reports

$214,500

total per year

Base

$165,000

Stock

-

Bonus

-

$214,500

$214,500

Interview experience

9 interviews

Difficulty

3.4

/ 5

Duration

14-28 weeks

Offer rate

44%

Experience

Positive 0%

Neutral 56%

Negative 44%

Interview process

1

Application Review

2

Online Assessment/Technical Screen

3

Phone Screen

4

Onsite/Virtual Interviews

5

Team Matching

6

Offer

Common questions

Coding/Algorithm

System Design

Behavioral/STAR

Technical Knowledge

Product Sense