About the job

As a Power Engineer in Technical Infrastructure, you will play a key role in the development of one of the world's fastest growing computing infrastructures. You will work as part of a team to deliver power solutions for point of load application. Your objective will be to design, analyze and implement board, substrate package and chip level power topologies and control for the point of load application including ASICs, FPGAs and processors.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $189,000-$274,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Innovate and design on board, on substrate and on chip level Power Delivery Networks (PDN). Analyze performance, cost, reliability and availability design trade-offs.

• Provide technical leadership and direction while troubleshooting system level power delivery issues.

• Partner with power industry leaders to lead evaluation and adoption of the most engaging technologies and engage cross functionally to ensure successful roll-out, testing and complete validation.

• Provide technical leadership and direction while troubleshooting system level power delivery issues.

• Work cross-functionally with the project teams, on system bring up and design validation. Perform lab design validation, correlation study and root cause debugging.

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.

• 6 years of experience working in a system-level power delivery network design, analysis, and validation technical environment.

• 3 years of experience in technical leadership.

• Experience with power management methodologies, power delivery, and signal integrity interactions of common Input/Output interfaces.

• Experience with PCB, package and silicon technologies, and their impact on power delivery solutions.

Preferred qualifications

• PhD in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.

• Experience in power integrity fundamentals, including board power conversion design for motherboard, data center hardware products, and power integrity conversion design.

• Experience with electronic design automation tools, and 3D/2D electromagnetic simulation tools, lab equipment, and scripting languages.

• Experience with lab measurement, validation and correlation at package and PCB level.

• Knowledge of system power delivery networks and switching voltage regulator modeling and simulation.