About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will be helping in bringing custom Application-Specific Integrated Circuits (ASICs) from concept through to production. You will be a part of the silicon validation effort of the overall silicon product development lifecycle. Your efforts may center on power features, interfaces, HBM memory, compute functionality, or various aspects of system performance.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Own the bringup and New Product Introduction (NPI) phases of the silicon development lifecycle. Enable custom silicon products within the platform infrastructure systems.

• Integrate and validate complex hardware/software designs in pre-silicon through functional bringup. Develop the integration plan, coordinate hardware and software delivery, and create necessary tests for validation.

• Develop detailed test plans, based on design specifications and coordinate with a cross-functional teams (e.g., architecture, design, software, firmware).

• Perform long-term system characterization. Debug and help root-cause failures, providing feedback to improve features like power management quality, performance, and reliability through generations of designs, including in pre-silicon prototyping platforms as well as through post-silicon bringup and production.

• Design, develop, operate, and maintain software based validation tests.

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

• 3 years of experience with silicon design or with semiconductors (e.g., digital design, silicon validation, computer architecture).

• Experience scripting in a programming language like Python or equivalent.

Preferred qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.

• Experience developing firmware, embedded software, or functional tests for silicon validation.

• Experience in silicon validation bringing up, characterizing, and qualifying silicon.

• Experience with high speed interfaces, ASIC interfaces, memory systems (HBM), aor power system features and high-power ASICs.