About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.

The US base salary range for this full-time position is $138,000-$202,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Partner with internal Process Engineering and Planning teams to identify bottlenecks or specialized processing needs for extended workforce. Translate technical needs into comprehensive "Statement of Work" (SOW) documents.

• Identify and evaluate potential suppliers and partners for advanced semiconductor processes. Assess their equipment sets, materials expertise, and baseline process capabilities (i.e., Epi, CMP, or Lithography).

• Act as a point of contact to develop new process capabilities at supplier sites. Oversee the transfer of process knowledge, ensuring that the supplier’s output aligns with our internal yield, quality, and performance specifications.

• Establish and monitor Key Performance Indicators (KPIs) at the supplier level. Utilize Statistical Process Control (SPC) and yield analysis to drive improvement, ensuring that outsourced processes are stable, repeatable, and scalable.

• Synthesize inputs from Quality, Process Engineering, and Supply Chain.

Minimum qualifications

• Bachelor's degree in Industrial Engineering, Supply Chain Management, Operations Research, or a related quantitative field or equivalent practical experience.

• 8 years of experience in Materials Science and Process Engineering within a wafer fabrication environment.

• Experience working with materials, specifically Google Affiliate Network (GaN) on Silicon.

• Experience in one or more of the following: Epitaxy, Chemical Mechanical Planarization (CMP), Dicing, Coring, Thin films deposition.

Preferred qualifications

• Master's degree or PhD in Electrical, Mechanical, Industrial, Materials, or a related engineering field.

• Experience with process development, process control and sustaining methodologies (e.g., SPC,Cp, Cpk).

• Experience in production and quality systems, including Statistical Process Control (SPC), yield improvement methodologies, and ISO/IATF standards.

• Experience scaling suppliers from NPI (New Product Introduction) to HVM (High Volume Manufacturing).