About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a Senior Staff Engineer and Architect on the Digital Signal Processing (DSP) team, you will be the principal technical leader defining the goal and strategy for the core algorithms that power our next-generation data center interconnects. You will leverage your exceptional expertise in communication theory, Forward Error Correction (FEC), and modulation to architect and invent novel, industry-leading solutions that redefine the boundaries of speed, efficiency, and reliability.

This is a highly influential, direct role where you will not only set the long-term technical direction for the entire organization but also mentor our most executive engineers and drive cross-functional alignment across hardware, software, and product teams to bring your architectural goal to life in silicon.The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $240,000-$334,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Lead the architecture, design, and implementation of DSP algorithms for high-speed optical communication systems. Drive the long-term technical roadmap and influence the company-wide strategy for our signal processing and communication architectures by anticipating and shaping future industry trends.

• Invent and analyze novel FEC and modulation schemes to achieve optimal performance, power, and complexity tradeoffs, setting new industry standards.

• Develop comprehensive system-level models using tools like Matlab, Python, or C++ to simulate, validate, and prove the feasibility of next-generation architectural concepts.

• Drive technical consensus and collaborate with executive leadership across logic design, verification, software, and product teams to ensure the successful implementation, integration, and bring-up of complex algorithms in custom silicon.

• Provide technical mentorship and guidance to a team of executive DSP and communication systems engineers, fostering culture of innovation, technical excellence, and engineering excellence.

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field or equivalent practical experience.

• 12 years of industry experience in digital signal processing, communication theory, and algorithm development.

• Experience in the architecture, design, and implementation of algorithms for communication systems, including FEC or modulation techniques.

Preferred qualifications

• Master's or PhD degree in Electrical Engineering, Computer Engineering, or a related technical field.

• Experience leading the development of multiple complex algorithms from initial concept through to successful, high-volume silicon production.

• Experience in the theory and practical implementation of modern FEC codes (e.g., LDPC, Staircase, Polar codes) and advanced modulation formats.

• Proven track record of designing and modeling multiple generations of high-speed optical communication transceivers or similar high-bandwidth systems.

• Excellent programming skills in Matlab for algorithm development, simulation, and analysis.

• A strong publication record in conferences or journals, with a history of influencing the direction of the industry.