Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.

Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.

Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.

Establish design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.

Document design specifications, analysis results, and validation reports to ensure compliance with standards and for future reference, while collaborating extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers

Bachelor's degree in Mechanical, Electrical Engineering, Material Science, or equivalent practical experience.

2 years of experience in the signal and power integrity field.