About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Collaborate with architects and cross-functional teams to define analog IP specifications to meet system requirements.

• Perform mixed-signal circuit design, simulation, and verification for critical analog and digital components. This includes, but is not limited to: Power management circuits like bias generators and regulators, General purpose or high speed IO cells, Sensors or data converters, Clocking circuits (Phase-Locked Loop (PLL), Frequency-Locked Loop (FLL), Delay-Locked Loop (DLL), buffers, phase interpolators).

• Collaborate with cross-functional teams, including digital design, layout, verification, and system integration to ensure robust circuit performance.

• Participate in post-silicon validation, debug, characterization, and production manufacturing and test.

Minimum qualifications

• Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.

• 4 years of experience with mixed-signal analog integrated circuit design.

• Experience in transistor-level schematic design, layout, simulation and verification.

Preferred qualifications

• Master's degree or PhD in Electrical Engineering or a related field.

• Experience with lab bring-up, silicon characterization, and debug of analog mixed-signal IPs.

• Experience with Python and System Verilog for scripting, data analysis, functional modeling, and exploring system-level tradeoffs.

• Experience working with CMOS processes (FinFET and GAA).

• Understanding of device physics and manufacturing processes.

• Excellent cross-functional communication skills.