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About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google’s data centers are the most advanced in the world. In this role, you will help build the state-of-the-art So Cs that power these facilities by driving quality and reliability processes in HVM from an IC perspective. An understanding of IC flows, wafer processing, testing, qualification, yield, reliability, and failure analysis is essential. You will partner with cross-functional teams to develop HVM quality and reliability specifications while collaborating with global hardware teams, silicon design, validation, and engineering groups to ensure fleet excellence.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Responsibilities
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Collaborate with design, manufacturing, and hardware quality teams to ensure High Performance Computing (HPC) SoC silicon products meet requirements during mass production, including statistical yield limits (SBL/SYL), yield tracking, and excursion monitoring.
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Drive all quality and reliability-related activities prior to and during mass production, leading MRB efforts to disposition manufacturing issues.
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Drive cross-functional investigation of IC quality and reliability issues to identify root causes and develop solutions (e.g., RMA triage, analytics, failure analysis, etc.).
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Confirm failure symptoms and guide Failure Analysis (FA) to verify root causes, while supporting fleet DPPM data collection, classification, and modeling.
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Manage periodic Ongoing Reliability Monitoring (ORM) activities, including reject validation and comprehensive data analysis.
Minimum qualifications
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Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
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5 years of experience with industry-standard tools, languages, and methodologies relevant to the development of silicon-based ICs and chips.
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5 years of experience with silicon quality or reliability.
Preferred qualifications
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Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
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12 years of experience in silicon quality or reliability.
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Experience in reliability modeling, data analytics, statistics, and production burn-in processes and familiar with silicon qualification test methods and hardware.
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Experience with material disposition, Material Review Board (MRB), RMA analysis, and Integrated Circuit (IC)/packaging failure mechanisms.
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Experience in CMOS technology, semiconductor reliability, and High Volume Manufacturing (HVM) processes and proficient in Failure Analysis/Failure Investigation (FA/FI) verification techniques.
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Knowledge of Design-for-Reliability (DfR) guidelines and implementation techniques, semiconductor device physics, failure mechanisms, and accelerated testing methodologies.
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Googleについて

Google specializes in internet-related services and products, including search, advertising, and software.
10,001+
従業員数
Mountain View
本社所在地
$1,700B
企業価値
レビュー
3.7
25件のレビュー
ワークライフバランス
3.8
報酬
4.2
企業文化
3.4
キャリア
3.9
経営陣
2.8
68%
友人に勧める
良い点
Excellent compensation and benefits
Smart and talented colleagues
Great perks and work flexibility
改善点
Management and leadership issues
Bureaucracy and slow processes
Constantly changing priorities and reorganizations
給与レンジ
57,502件のデータ
Junior/L3
L3
L4
L5
L6
L7
L8
Mid/L4
Principal/L7
Senior/L5
Staff/L6
Director
Junior/L3 · Data Scientist L3
0件のレポート
$176,704
年収総額
基本給
-
ストック
-
ボーナス
-
$150,298
$203,110
面接体験
9件の面接
難易度
3.4
/ 5
期間
14-28週間
内定率
44%
体験
ポジティブ 0%
普通 56%
ネガティブ 44%
面接プロセス
1
Application Review
2
Online Assessment/Technical Screen
3
Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
よくある質問
Coding/Algorithm
System Design
Behavioral/STAR
Technical Knowledge
Product Sense
ニュース&話題
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3d ago
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3d ago