Develop strategies for system segmentation to enable programmatic assembly of custom solutions based off user design intent.

Architect RTL systems to allow for automated optimization of RTL performance, power and area based off solution requirements.

Build and implement RTL code for various digital blocks, including control logic, and on-chip data paths.

Engage in SoC IP integration and sign-off activities.

Contribute to the development and improvement of design flows, tools and methodologies.

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.

2 years of experience architecting RTL solutions employing software based construction, instantiation, customization or generation of RTL.

Experience with SOC implementation standards and interfaces (i.e. AXI).

Experience with scripting languages (i.e. Tcl, Python or Perl).

Experience with digital design, including synchronous and asynchronous logic, state machines, and bus protocols.