Contribute to CPU subsystem design, focusing on SoC integration related activities, functional debug and preparation for post-silicon testing.

Participate in post-silicon CPU subsystem design activities for mobile devices, focusing on hardware-software integration and validation of CPU features in real silicon.

Contribute to CPU subsystem micro-architecture and RTL design, delivering production-quality designs that meet power, performance, and area (PPA) goals for next-generation processors.

Develop knowledge in CPU or AI accelerator architecture, design, and debug.

Propose and implement performance-enhancing micro-architecture features, working with architects and performance teams to facilitate decision-making.

Bachelor's degree in electrical engineering, computer engineering, computer science, a related field, or equivalent practical experience.

8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or System Verilog.

Experience with silicon validation and hardware debugging for phone/mobile-class application processors.

Experience with logic techniques and RTL static checks (e.g., Lint and CDC).