About the job

As a Silicon Engineering Intern, you will work in a team that is shaping the future of Google Cloud Silicon, including TPUs, arm-based servers, and network products. You will collaborate with hardware and software architects and designers to architect, model, analyze, define, and design next-generation Cloud Silicon. You will have dynamic, multi-faceted responsibilities in areas such as product definition, design and implementation, collaborating with the Engineering teams to drive the optimal balance between performance, power, features, schedule, and cost.

The ML, Systems, and Cloud AI (MSCA) organization at Google designs, implements and manages the hardware, software, machine learning and systems infrastructure for all Google services (e.g., Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers, and people who use Google services around the world. We prioritize security, efficiency, and reliability across everything we do - from developing our latest Cloud Silicon products to running a global network, while driving towards shaping the future of hyperscale computing.

Google is and always will be an engineering company. We hire people with a broad set of technical skills who are ready to address some of technology's greatest challenges and make an impact on millions, if not billions, of users. At Google, engineers not only revolutionize search, they routinely work on massive scalability and storage solutions, large-scale applications and entirely new platforms for developers around the world. From Google Ads to Chrome, Android to YouTube, Social to Local, Google engineers are changing the world one technological achievement after another.

Responsibilities

• Responsibilities may vary based on specific teams.

Minimum qualifications

• Currently pursuing a PhD degree in Computer Engineering, Computer Science, Electronics and Communication Engineering, Electrical Engineering, or a related technical field

• Experience in programming languages (e.g., C++, Python, Verilog, UVM), Synopsys and Cadence tools

• Experience in one or more of the following areas: hardware system integration, product design, computer architecture, digital design verification, digital circuits, ASIC physical design, FPGAs, embedded systems, memory systems

Preferred qualifications

• Experience with performance modeling tools, C++, Python or silicon design tools in front end/design verification/physical design

• Knowledge of arithmetic units, bus architectures, accelerators or memory hierarchies; computer architecture; linear algebra; or ML/DL background

• Knowledge of high performance and low power design techniques

• Currently attending a degree program in India and available to work full time for 12 weeks outside of university term time