About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a Staff Engineer on the Digital Signal Processing team, you will be a technical leader responsible for architecting and developing the core algorithms that power our next-generation data center interconnects. You will leverage your deep expertise in communication theory, forward error correction (FEC), and modulation to design novel, low-complexity solutions that push the boundaries of speed and reliability.

You will not only define the technical direction for critical projects but also mentor other engineers and collaborate across hardware and software teams to bring your goal to life in silicon.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're behind Google's groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $192,000-$278,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Architect, design, and implement Digital Signal Processing (DSP) algorithms for high-speed optical communication systems, while driving the long-term technical roadmap for signal processing and communication architectures by staying current with academic and industry trends.

• Develop and analyze novel Forward Error Correction (FEC) and modulation schemes to optimize for performance, power, and complexity tradeoffs.

• Build comprehensive system-level models using tools like Matlab, Python, or C++ to simulate and validate algorithm performance.

• Collaborate closely with logic design, verification, and software teams to ensure the successful implementation, integration, and bring-up of algorithms in custom silicon.

• Provide technical leadership and mentorship to a team of DSP and communication systems engineers, fostering innovation and engineering excellence.

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.

• 10 years of industry experience in digital signal processing, communication theory, and algorithm development.

• Experience in the design and implementation of algorithms for communication systems, including Forward Error Correction (FEC) or modulation techniques.

Preferred qualifications

• Master's or PhD degree in Electrical Engineering, Computer Engineering, or a related technical field.

• Experience in the theory and practical implementation of modern FEC codes (e.g., LDPC, Staircase, Polar codes) and advanced modulation formats.

• Experience in designing and modeling high-speed optical communication transceivers or similar high-bandwidth systems.

• Experience publishing in conferences or journals in the field of communications or signal processing.

• Experience leading the development of complex algorithms from initial concept through to successful silicon production.

• Excellent programming skills in Matlab for algorithm development, simulation, and analysis.