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About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Responsibilities
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Lead architecture and implementation of advanced backend Computer Aided Design (CAD) flows, enabling methodologies through automation tools.
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Optimize design flows for 3 dimensional integrated circuit (3DIC) and advanced packaging to ensure manufacturability.
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Drive evaluation and integration of electronic design automation (EDA) tools like Integrity 3DIC or synopsys 3DIC compiler from flow development point of view.
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Partner with global teams to standardize best practices in chip design flow techniques.
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Lead complex technical projects from concept to closure and mentor junior engineers.
Minimum qualifications
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Bachelor’s degree in Computer Science, Information Technology, Electrical Engineering, or equivalent practical experience.
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5 years of experience with flow development and automation experience in Backend CAD, and in programming languages such as Python or C++
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5 years of experience in ASIC/SoC design or CAD/EDA methodology, or EDA research and development/product engineering.
Preferred qualifications
- 8 years of experience in ASIC/SoC design or CAD/EDA methodology, or EDA research and development/product engineering.
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0
応募クリック数
0
模擬応募者数
0
スクラップ
0
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Googleについて

Google specializes in internet-related services and products, including search, advertising, and software.
10,001+
従業員数
Mountain View
本社所在地
$1,700B
企業価値
レビュー
4.5
10件のレビュー
ワークライフバランス
3.2
報酬
4.3
企業文化
4.1
キャリア
4.2
経営陣
3.8
82%
友人に勧める
良い点
Great benefits and perks
Innovative and interesting work
Career development and learning opportunities
改善点
High pressure and expectations
Long hours and heavy workload
Fast-paced and overwhelming environment
給与レンジ
57,503件のデータ
Mid/L4
Mid/L4 · Accessibility Analyst
1件のレポート
$214,500
年収総額
基本給
$165,000
ストック
-
ボーナス
-
$214,500
$214,500
面接体験
9件の面接
難易度
3.4
/ 5
期間
14-28週間
内定率
44%
体験
ポジティブ 0%
普通 56%
ネガティブ 44%
面接プロセス
1
Application Review
2
Online Assessment/Technical Screen
3
Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
よくある質問
Coding/Algorithm
System Design
Behavioral/STAR
Technical Knowledge
Product Sense
ニュース&話題
Our eighth generation TPUs: two chips for the agentic era - blog.google
blog.google
News
·
1d ago
Google Maps on Android Auto now shows bigger labels on streets along your route [Gallery] - 9to5Google
9to5Google
News
·
1d ago
Google to invest up to $40 billion in AI rival Anthropic - Reuters
Reuters
News
·
1d ago
Google to invest up to $40B in Anthropic in cash and compute - TechCrunch
TechCrunch
News
·
1d ago