About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will develop and deploy comprehensive automatic test equipment (ATE) solutions for high-volume manufacturing at FABs and OSATs. You will integrate system on a chip (SoC) technologies into devices and facilitate ATE testing to validate performance and screen units. You will lead all testing aspects, collaborating with cross-functional teams to ensure optimal production coverage and high-quality So Cs.

You will develop digital and mixed-signal tests, automation methodologies, and internal tools for test program management. Additionally, you will release cost-effective test solutions into mass production.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Design, implement, and manage IC product bring-up, verification, and characterization programs for NPI, including ATE test programs, load boards, and probe cards using ATE platforms such as UFLEX or 93K.

• Collaborate with vendors and internal teams to engineer high-volume ATE manufacturing solutions tailored for advanced packaging.

• Execute product and DPPM correlation between ATE and system-level environments for new products.

• Enhance test coverage and resolve various failure modes via rigorous troubleshooting on ATE and system level testing (SLT) systems.

• Direct production sustaining activities, including program upgrades, yield optimization, test time reduction, lot disposition, and RMA analysis.

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience.

• 10 years of experience in the semiconductor industry.

• 5 years of experience managing IC qualification, production releases, and system-level testing, with a focus on data review, yield enhancement, and test time.

• Experience with integrated circuit (IC) testing, and in Yield and Bin Pareto analysis.

Preferred qualifications

• Master's degree or PhD in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, or related degree.

• Experience in semiconductor processing, VLSI product or test engineering, with SLT, and using the advantest platform.

• Experience with ATE platforms (Teradyne Ultra Flex SoC and Advantest 93K), with knowledge of high-speed interfaces (DDR, PCIe, SERDES).

• Understanding of design for testing (DFT) methodologies, including memory BIST, JTAG, Scan/ATPG, and testing for PVT and temperature sensors.

• Understanding of advanced packaging technologies such as InFO and 2.5D.

• Ability to utilize data analysis tools (O+, Datapower, or JMP).