Participate in ATE test program development for high volume manufacturing (HVM) and characterization, work with ATE Vendors and internal cross-functional teams.

Own IP-level test development for design for testing (DFT) structural tests, functional tests, or e Fuse programming.

Support chip-level DFT test development for Automatic Test Pattern Generation (ATPG) Scan, Memory Built-In Self Test (MBIST), logic and memory diagnostics, logic redundancy analysis, or memory repair.

Participate in developing and executing strategies for SoC product NPI, bring-up, verification, characterization, and qualification support, including bench test, troubleshooting, test coverage optimization, new product Defective Parts per Million (DPPM) correlation, and product correlation between system and ATE.

Provide support for production, including test program upgrade and release, volume data analytics, test time reduction and yield improvement, and Return Materials/Merchandise Authorization (RMA) analysis.

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

8 years of experience in test engineering or product engineering.

Experience in ASIC or SoC test development, bring-up, or debug for NPI or HVM.

Experience with Automatic Test Equipment (ATE) (e.g., Advantest or Teradyne platforms).