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职位GlobalFoundries

Fab 9 Technology Development GaN Epitaxial Engineer

GlobalFoundries

Fab 9 Technology Development GaN Epitaxial Engineer

GlobalFoundries

Essex Junction

·

On-site

·

Full-time

·

1w ago

About Global Foundries:

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Summary of Role:

Global Foundries is seeking highly skilled and motivated semiconductor process development engineer to join our Fab9 Technology Development team to develop and qualify world class differentiated semiconductor technologies for manufacture in the 200mm manufacturing fabricator in Essex Junction, Vermont (Fab9). As a Lead Epitaxy development engineer you will be responsible to design and develop discrete semiconductor GaN Epitaxy processes that that meet the performance, reliability, yield, and cost objectives to drive the advancement of our semiconductor foundry technology offerings for Analog, Mixed Signal, Power, Radio Frequency (RF) and other differentiated market applications. This leadership position will also require providing guidance and strategic project reviews with other technology teams.

Essential Responsibilities

  • Initial and primary responsibilities could include but not limited to the following:

  • Develop and evaluate the MOCVD III-V epitaxial processes. Technology platforms can include bulk silicon, silicon-on-insulator (SOI), silicon germanium (Si Ge), and wide band gap semiconductors (e.g. GaN, SiC, etc).

  • Define and optimize III-V superlattices, buffers, and device layers and requirements as defined in the Technology Development roadmap.

  • Plan and manage processing of wafer lots to meet program schedules.

  • Perform and evaluate experiments using multiple techniques and failure analysis signals such as SIMs, SEM, TEM, AFM (Atomic Force Microscopy), etc. – Work with our cross-organization teams to obtain and interpret

  • Address manufacturability challenges such as epitaxial deposit time, selectivity, etc.,.

  • Collaborate with the various development test, test-site, process, integration, and program management teams within our group to lead the development of new epitaxial processes to meet performance, reliability, yield, and cost objectives.

  • Collaborate with various engineering teams outside the Fab9 Technology Development team, e.g., testing, failure analysis, unit module process, reliability, manufacturing, and research organizations, to facilitate and achieve program success.

  • Collaborate with manufacturing process engineers and characterization teams on evaluations of optimal processes

  • Work with semiconductor process teams on novel process integration.

  • Work with Reliability team on any issues or concerns with the quality of the new semiconductor processes

  • Plan, execute, characterize, and determine outcomes/actions of process development learning cycles and document accordingly.

  • Define process specifications, and document Process of Record in controlled engineering specifications.

  • Document & Create process qualification packages for internal Reliability, Manufacturing, and Quality Teams.

  • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Other Responsibilities:

Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:

  • Education: Minimum Master's degree in electrical engineering, Microelectronics, Material Science, Solid State Physics or other relevant engineering or physical science discipline.

  • Experience: Minimum 1-3 years of relevant engineering experience.

  • Travel Requirements: < 10% of Travel.

  • Language Fluency: English (written & verbal)

  • A comprehensive knowledge of modern device physics: FET, BJT, LDMOS, and HEMT devices in bulk silicon, silicon-on-insulator (SOI), silicon germanium (Si Ge), and/or compound semiconductor (e.g. GaN, SiC, etc) technologies.

  • Familiarity of MOCVD III-V Epitaxial Growth Techniques.

  • Familiarity of semiconductor device electrical testing and analysis methods.

  • Familiarity with the usage of TCAD to simulate devices.

  • Knowledge in device reliability mechanisms, device physical characterization (SIMS, TEM, SEM, LSM, Scanning Capacitance, AFM), device electrical characterization.

  • Strong problem-solving skills.

  • The ability to effectively work with colleagues, clients, partners, and unit process engineers.

Preferred Qualifications:

  • Education: PhD in Electrical Engineering, Microelectronics, Material Science, Solid State Physics or other relevant engineering or physical science discipline.

  • Experience: Minimum 3-5 years of relevant epitaxial growth engineering experience.

  • Experience and comprehensive knowledge of semiconductor device electrical testing and analysis methods.

  • Excellent interpersonal skills, energetic, motivated, and self-driven

  • Demonstrate ability to work well within a global matrixed team or environment with minimal supervision

  • Outstanding communication skills - both written and verbal

  • Demonstrated ability to communicate well with all levels of the organization and experience in working with external constituencies

  • Strong organizational skills; demonstrated ability to manage multiple tasks simultaneously and able to react to shifting priorities to meet business needs

  • Demonstrated ability to meet deadlines and commitments

Expected Salary Range

$118,000.00 - $210,000.00

The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

An offer with Global Foundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.

Global Foundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. Global Foundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law

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关于GlobalFoundries

GlobalFoundries

GlobalFoundries Inc. is a multinational semiconductor contract manufacturing and design company domiciled in the Cayman Islands and headquartered in Malta, New York.

10,001+

员工数

Santa Clara

总部位置

$25.1B

企业估值

评价

3.9

10条评价

工作生活平衡

3.2

薪酬

2.5

企业文化

4.1

职业发展

3.0

管理层

3.0

72%

推荐给朋友

优点

Good team dynamics and collaboration

Supportive management and colleagues

Learning and development opportunities

缺点

Below average compensation and pay

Limited career advancement opportunities

High workload and long hours

薪资范围

41个数据点

Junior/L3

Junior/L3 · Venture Capitalist

0份报告

$89,550

年薪总额

基本工资

-

股票

-

奖金

-

$76,118

$102,983

面试经验

51次面试

难度

3.3

/ 5

时长

14-28周

录用率

36%

体验

正面 68%

中性 20%

负面 12%

面试流程

1

Phone Screen

2

Technical Interview

3

Hiring Manager

4

Team Fit

常见问题

Technical skills

Past experience

Team collaboration

Problem solving