招聘
Job Description Summary
Lead Verification & Validation Engineer (m/f/d) will be responsible for the delivery of the of HVDC Controls & Protection Verification and Validation team’s activities on time / as per Project Scheduled through proper coordination between Project and department. The role involves technical leadership on the various work packages within the department ensuring that they meet the requirements, and the relevant processes are followed.
Job Description
Job Description
Essential responsibilities:
- Prepare and maintain Validation & Verification team’s activity plans as per the Project scheduled.
- Design, create Factory System Test (FST) cases and review results against design requirements including leading Factory Acceptance Tests (FAT) with clients.
- Developing HVDC System and plant modelling in electromagnetic transient tools like PSCAD, RSCAD, EMTP-RV etc including undertaking Dynamic Performance Studies and Protection co-ordination.
- Preparing control system requirements for the RTDS Lab setup including AC DC interface requirement, Plant Emulator Interface requirement and RSCAD Power system network conversion, modelling, and verification.
- Support New Product Introduction (NPI) to develop existing and new products and tools.
- Provide support to Commissioning Engineers during Dynamic commissioning at Site.
- Support continual improvement, raising the effectiveness and efficiency of the team through the introduction of tools, methods and process improvements and coordinating with the Continuous Improvement leaders.
Qualifications and requirements:
- Engineering degree or equivalent including power systems and power electronics subjects or proven equivalent knowledge and experience in HVDC business.
- Significant experience (7+ years) in the position of Verification Engineer in High Voltage field, with experience as a Control & Protection design Engineer. Good knowledge of overall 400kV substation, HVDC system (LCC/VSC/SVC) including control and protection system is essential.
- Experience of developing and working with PSCAD and RSCAD models is essential including knowledge of Overall HVDC System Operational Behaviour.
- Experience in technical leadership with ability to manage team of validation engineers.
- Strong communication skills with a fluency in English language.
- Willingness to travel to support projects globally and readiness for flexible with working hours.
- Knowledge of applicable electrical standards such as IEC 61850, IEC 62351, IEC 12207, IEEE 15288, IEC 25010, IEC 27032, NERC/CIP.
Desired characteristics
- Process improvement or RCA experience or certification.
- Experience on MATCAD, PSS/E and MATLAB SIMULINK, EMTP-RV, Digsilent etc will added advantage.
- Excellent communication and interpersonal skills.
Additional Information Relocation Assistance Provided: No
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关于GE Vernova

GE Vernova
PublicGE Vernova, Inc. is an energy equipment manufacturing and services company headquartered in Cambridge, Massachusetts.
10,001+
员工数
Boston
总部位置
$16B
企业估值
评价
3.6
10条评价
工作生活平衡
2.8
薪酬
4.0
企业文化
4.1
职业发展
2.9
管理层
2.7
65%
推荐给朋友
优点
Supportive management and great team culture
Excellent benefits and compensation
Professional development opportunities
缺点
Heavy workload and overtime expectations
Limited growth and advancement opportunities
Poor management responsiveness
薪资范围
143个数据点
Junior/L3
Junior/L3 · Business Analyst
0份报告
$92,460
年薪总额
基本工资
-
股票
-
奖金
-
$78,591
$106,329
面试经验
4次面试
难度
3.3
/ 5
时长
14-28周
体验
正面 0%
中性 75%
负面 25%
面试流程
1
Application Review
2
HR Screen
3
Technical Interview
4
Hiring Manager Interview
5
Final Technical Round
常见问题
Technical Knowledge
Behavioral/STAR
Past Experience
Coding/Algorithm
新闻动态
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