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ASIC Engineering Layout Leader | Custom IC layout, Analog, Mixed-signal, and high-speed designs | 12+ years, Bangalore at Cisco

RoleEmbedded
LevelLead
LocationBangalore, India
WorkOn-site
TypeFull-time
Posted1 day ago
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About the role

Meet the Team

At Cisco Systems, the Client Optics Group (COG) Engineering team is at the forefront of building next-generation optical interconnect solutions powering high-speed networking. The team focuses on delivering cutting-edge 100G, 200G, and 400G per lambda technologies that enable scalable, high-performance data movement across modern infrastructure.

As a Layout Lead, you will work within a highly collaborative, cross-functional environment alongside analog and mixed-signal designers, digital engineers, packaging experts, process technologists, and validation teams. Together, you will drive end-to-end development of complex silicon solutions that are critical to Cisco’s innovation in optics and high-speed connectivity.

Your Impact

In this role, you will provide technical leadership and drive the physical implementation of high-performance analog and mixed-signal designs from concept through tapeout.

You will:

  • Lead end-to-end layout development for complex analog, mixed-signal, and high-speed circuits including Ser Des and PAM4 interfaces
  • Own block-level and top-level floorplanning, placement, routing, and integration
  • Translate circuit schematics and performance requirements into optimized, manufacturable layouts
  • Optimize designs for parasitics, matching, signal integrity, power integrity, thermal behavior, and yield
  • Ensure compliance with all physical verification requirements (DRC, LVS, ERC, EM/IR, density, reliability)
  • Drive integration across analog, digital, and high-speed domains including clocking and control logic
  • Support post-layout extraction, simulation closure, and tapeout readiness
  • Partner with packaging teams on bump planning, pad ring, ESD, and overall package integration
  • Identify and resolve layout challenges impacting performance, yield, or manufacturability
  • Lead design reviews, assess trade-offs, and mitigate tapeout risks
  • Improve layout methodologies, flows, and automation in collaboration with CAD teams
  • Mentor junior engineers and strengthen layout best practices across the team
  • Support silicon bring-up, debug, and failure analysis

Minimum Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering or a related field
  • 7+ years of experience in custom IC layout (analog, mixed-signal, or high-speed designs)
  • Proven experience leading block-level or top-level layout through full tapeout cycles
  • Strong expertise in custom layout, parasitic-aware design, and physical verification
  • Hands-on experience with industry-standard tools such as Cadence Virtuoso (or equivalent)
  • Solid understanding of DRC, LVS, ERC, and physical signoff methodologies

Preferred Qualifications

  • 10–12 years of experience in advanced-node layout implementation (FinFET, GAA, or similar technologies)
  • Deep expertise in layout techniques such as common-centroid, interdigitation, shielding, and isolation
  • Strong understanding of signal integrity, power integrity, and thermal effects in high-speed designs
  • Experience working on Ser Des, PAM4, or other high-speed interface designs
  • Familiarity with EM/IR analysis, parasitic extraction, and reliability considerations
  • Experience with scripting (Python, Perl, or TCL) for automation
  • Comfortable working in Linux-based environments
  • Demonstrated technical leadership and ability to drive execution across global, cross-functional teams
  • Strong communication, problem-solving, and collaboration skills

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Required skills

Custom IC layout

Analog design

Mixed-signal design

Physical design

DRC/LVS

Signal integrity

Floorplanning

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About Cisco

Cisco

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Cisco Systems, Inc. is an American multinational technology conglomerate corporation that develops, manufactures, and sells hardware, software, telecommunications equipment and other high-technology services and products focused on networking, cyber security and AI.

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San Jose

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Valuation

Reviews

10 reviews

4.3

10 reviews

Work-life balance

3.5

Compensation

4.2

Culture

4.6

Career

3.8

Management

4.0

78%

Recommend to a friend

Pros

Supportive and friendly team culture

Flexible work arrangements and remote options

Excellent benefits and competitive compensation

Cons

High-pressure and demanding work environment

Work-life balance challenges

Limited career advancement opportunities

Salary Ranges

0 data points

L2

L6

L3

L4

L5

L2 · Business Analyst L2

0 reports

$70,294

total per year

Base

$28,118

Stock

$35,147

Bonus

$7,029

$49,206

$91,382

Interview experience

4 interviews

Difficulty

3.0

/ 5

Duration

14-28 weeks

Experience

Positive 0%

Neutral 25%

Negative 75%

Interview process

1

Application Review

2

Phone Screen

3

Technical Interview Round 1

4

Technical Interview Round 2

5

Behavioral Interview

6

Team Matching

7

Final Round

Common questions

Coding/Algorithm

System Design

Behavioral/STAR

Technical Knowledge