
The bridge to possible.
ASIC Engineering Technical Leader
Meet the Team:
The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. With ~2,100 employees across 16 countries, we design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#Cisco Silicon One) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in Bangalore India with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities.
- Your Impact
- Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs.
- Responsible for development of innovative DFT IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL.
- Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows.
- Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug strategies.
- The job requires the candidate to have the ability to craft solutions and debug with minimal mentorship.
Minimum Qualifications:
- Bachelor's or a Master’s Degree in Electrical or Computer Engineering required with at least 10 years of experience.
- Knowledge of the latest innovative trends in DFT, test and silicon engineering.
- Experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
- Experience with ATPG and EDA tools like Test Max, Tetramax, Tessent tool sets, Prime Time
- Experience working with Gate level simulation, debugging with VCS and other simulators.
- Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687
- Strong verbal communication skills and ability to thrive in a multifaceted environment
- Scripting skills: Tcl, Python/Perl.
Preferred Qualifications:
-
Verilog design experience - developing custom DFT logic & IP integration; familiarity with functional verification
-
DFT CAD development
-
Test Architecture, Methodology and Infrastructure
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Test Static Timing Analysis
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Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design
Why Cisco?
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
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Cisco
PublicCisco Systems, Inc. is an American multinational technology conglomerate corporation that develops, manufactures, and sells hardware, software, telecommunications equipment and other high-technology services and products focused on networking, cyber security and AI.
10,001+
员工数
San Jose
总部位置
$317B
企业估值
评价
10条评价
4.3
10条评价
工作生活平衡
3.5
薪酬
4.2
企业文化
4.6
职业发展
3.8
管理层
4.0
78%
推荐率
优点
Supportive and friendly team culture
Flexible work arrangements and remote options
Excellent benefits and competitive compensation
缺点
High-pressure and demanding work environment
Work-life balance challenges
Limited career advancement opportunities
薪资范围
0个数据点
L2
L6
L3
L4
L5
L2 · Business Analyst L2
0份报告
$70,294
年薪总额
基本工资
$28,118
股票
$35,147
奖金
$7,029
$49,206
$91,382
面试评价
4条评价
难度
3.0
/ 5
时长
14-28周
体验
正面 0%
中性 25%
负面 75%
面试流程
1
Application Review
2
Phone Screen
3
Technical Interview Round 1
4
Technical Interview Round 2
5
Behavioral Interview
6
Team Matching
7
Final Round
常见问题
Coding/Algorithm
System Design
Behavioral/STAR
Technical Knowledge
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