Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens.

Meet the Team

Cisco is building some of the most complex and advanced silicon in the industry, focusing on high-performance, large-scale So Cs that power next-generation networking platforms. Our team provides an end-to-end view of chip development, offering interns the rare opportunity to work on full-chip and SoC-level designs rather than being limited to a single IP. You will join a collaborative and supportive environment where industry experts with real tape-out experience provide mentorship and structured technical training. The vibe is fast-paced and innovation-driven, perfect for those eager to see how production silicon is built from spec to tape-out. It is an exciting place to gain exposure to the latest silicon technologies and methodologies used in global-scale systems.

Your Impact

Contribute to the development of state-of-the-art chips by working on full-chip digital design, Design for Test (DFT), and physical design tasks. Develop automation and productivity scripts using Python or Tcl to streamline the ASIC design cycle and improve engineering efficiency. Collaborate with cross-functional teams across design and implementation to ensure seamless integration of complex SoC architectures. Gain hands-on experience with synthesis, floorplanning, and routing to understand the complete RTL-to-GDS flow. This role allows you to make a tangible impact on silicon that powers infrastructure used by millions of people worldwide.

Minimum Qualifications

• Currently enrolled in a Bachelor’s or Master’s program in Microelectronics, VLSI, Electrical/Electronics Engineering, Computer Science, or a related field.
• Good proficiency in a scripting language such as Python or Tcl.
• Completed coursework in digital logic and computer architecture fundamentals.
• Foundational knowledge of MOS devices and semiconductor physics.
• Academic exposure to introductory VLSI or ASIC design concepts.

Preferred Qualifications

• Interest in learning industry-standard ASIC design flows and EDA tools.
• Strong analytical and problem-solving skills applied to hardware design.
• Ability to thrive and collaborate effectively in a fast-paced engineering environment.
• Desire to learn about complex SoC interconnects, clocks, resets, and power domains.
• Willingness to engage in structured onboarding and technical mentorship programs.

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.