採用
必須スキル
RTL Design
Verilog
VHDL
Chip Design
Python
TCL
Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs.
Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference.
Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation.
About The Role:
As a lead front-end design engineer, you will be a key part of the world-class team designing and developing the next generations of the Cerebras Wafer Scale Engine (WSE). This role requires deep expertise in RTL design and integration, with a strong focus on delivering high-performance, power-efficient, and scalable solutions. The role also requires close collaboration and management of external ASIC vendor. You will collaborate closely with the design verification, physical design, software and system teams to bring innovative semiconductor architectures from concept to production, addressing the unique challenges of building WSE systems.
Responsibilities
Drive all aspects of chip design, including Functional Specification, Micro-architecture, RTL development, Synthesis.
Managing external ASIC vendor through product development cycle.
Work closely with PD team members for design closure to meet PPA goals.
Work closely with Design verification and DFT teams for achieving the best functional and test coverage.
Work with software and system teams to understand opportunities to deliver optimal performance and feature set for the product.
Debug silicon-level functional, timing, and power issues during bring up.
Requirements
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Master’s degree in Computer Science, Electrical Engineering, or equivalent.
-
Can work in a hybrid work environment.
8-15 years of experience in delivering complex, high performance high quality RTL designs.
Experience with Front End Chip integration and third-party IP integration.
Demonstrated experience in networking, high-performance computing, machine learning or related fields.
Proven track record of multiple silicon success.
Experience collaborating and managing external vendors.
Experience with designing/integrating high speed IO.
Networking stack experience including TCP/IP, RDMA and Ethernet.
Knowledge of PCIe, CPU interfaces and Serdes technology.
Working knowledge of scripting tools : Python, TCL.
Assets
Experience with FPGA development toolchain, including Place and Route, Floor planning and Timing Analysis is a plus.
The base salary range for this position is $175,000 to $275,000 annually. Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.
Why Join Cerebras
People who are serious about software make their own hardware. At Cerebras we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras:
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Build a breakthrough AI platform beyond the constraints of the GPU.
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Publish and open source their cutting-edge AI research.
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Work on one of the fastest AI supercomputers in the world.
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Enjoy job stability with startup vitality.
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Our simple, non-corporate work culture that respects individual beliefs.
Read our blog: Five Reasons to Join Cerebras in 2026.
Apply today and become part of the forefront of groundbreaking advancements in AI!
*Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. **We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies.*We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.
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Cerebrasについて

Cerebras
Series F+Cerebras Systems Inc. is an American artificial intelligence (AI) company with offices in Sunnyvale, San Diego, Toronto, and Bangalore, India. Cerebras builds computer systems for complex AI deep learning applications.
201-500
従業員数
Sunnyvale
本社所在地
$4.1B
企業価値
レビュー
4.0
10件のレビュー
ワークライフバランス
2.8
報酬
4.2
企業文化
4.1
キャリア
4.3
経営陣
3.5
72%
友人に勧める
良い点
Innovative and cutting-edge technology
Supportive and collaborative team environment
Good compensation and benefits
改善点
Work-life balance challenges
High workload and expectations
Fast-paced and stressful environment
給与レンジ
33件のデータ
Mid/L4
Mid/L4 · Customer Solutions Architect
1件のレポート
$192,007
年収総額
基本給
$166,962
ストック
-
ボーナス
-
$192,007
$192,007
面接体験
50件の面接
難易度
3.9
/ 5
期間
21-35週間
内定率
23%
体験
ポジティブ 72%
普通 9%
ネガティブ 19%
面接プロセス
1
Recruiter Screen
2
ML Coding
3
ML System Design
4
Research Discussion
5
Team Interviews
よくある質問
ML fundamentals
Design an ML system
Research paper discussion
Statistical concepts
ニュース&話題
Nvidia Stock Faces a $20 Billion AI Chip Test as Cerebras Heads for IPO - TechStock²
TechStock²
News
·
3d ago
U.S. IPO Weekly Recap: IPO Calendar Heats Up As AI Chipmaker Cerebras Rejoins The Public Pipeline - Seeking Alpha
Seeking Alpha
News
·
3d ago
Nvidia Rival Cerebras Files For IPO After Scrapping Plans Last Year - Amazon.com (NASDAQ:AMZN), Barclays - Benzinga
Benzinga
News
·
3d ago
AI Chipmaker Cerebras Systems Files Publicly for US IPO - MENA Fintech Association
MENA Fintech Association
News
·
3d ago