Jobs
Required Skills
Virtuoso
UNIX
Shell
Tcl
DRC
LVS
FILL
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Position Description:
Developing precise test cases for FILL/DRC/LVS rules based on foundry decks with good quality by Virtuoso
Working closely with PE and R&D for new features/enhancements of Pegasus
DRC/FILL/LVS/PERC including deck coding/QC pattern generation
Assuring the quality of physical validation tool Pegasus by analyzing existing test suites
Validating code changes and integrating customer cases as part of regression test suite
Requirements:
Good at Virtuoso for simple pattern creation (familiar with SKILL is a plus)
With experience in developing and supporting physical verification activities in FILL/DRC/LVS area
Solid knowledge of foundry layout rules and device identification concepts
Working experience with UNIX and knowledge for shell/tcl scripting languages (familiar with Perl and/or python is a plus)
Should be able to work independently and have adequate personality & communication skills to cooperate with cross functional groups
We’re doing work that matters. Help us solve what others can’t.
Total Views
0
Apply Clicks
0
Mock Applicants
0
Scraps
0
Similar Jobs

Systems Design Engineer (Mechanical/Thermal)
AMD · Hsinchu

Principal Applications Engineer
ARM · hsinchu

Summer 2026 - Silicon Design Verification Engineer Intern
AMD · Hsinchu

Technical Product Support (TPS) Engineer III Senior - (E3) - MDP
Applied Materials · Hsinchu, Taiwan; Taichung, Taiwan

Customer Engineer II - (C2) - PDC
Applied Materials · Hsinchu, Taiwan
About Cadence

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
Employees
San Jose
Headquarters
Reviews
3.3
7 reviews
Work Life Balance
2.0
Compensation
2.5
Culture
1.8
Career
2.0
Management
1.5
15%
Recommend to a Friend
Pros
Built strong client relationships
Useful for repetitive tasks
Employment opportunities
Cons
Poor management and micromanagement
Lack of career growth opportunities
Technical architecture and code quality issues
Salary Ranges
65 data points
Junior/L3
Junior/L3 · Data Analyst
1 reports
$91,103
total / year
Base
$85,276
Stock
-
Bonus
$5,827
$59,612
$139,984
Interview Experience
1 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
Common Questions
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
News & Buzz
Cadence Design Systems (CDNS) Valuation Check After Lightmatter Photonic AI Partnership - simplywall.st
Source: simplywall.st
News
·
5w ago
Cadence Design Systems: Riding The AI Supercycle, But With Expectations At The Limit - Seeking Alpha
Source: Seeking Alpha
News
·
5w ago
Cadence Design Systems, Inc. (CDNS): Analyst Consensus and Growth Potential in the Booming Technology Sector - DirectorsTalk Interviews
Source: DirectorsTalk Interviews
News
·
5w ago
Lightmatter AI Photonics Pact Might Change The Case For Investing In Cadence Design Systems (CDNS) - simplywall.st
Source: simplywall.st
News
·
5w ago