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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Responsible for designing, developing, troubleshooting and debugging PCB/package/chip thermal analysis software.
Works on extremely complex problems where analysis of situations or data requires an evaluation of intangible variance factors.
Position Requirements:
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The candidate should be attending a BS, MS or PhD program in ME/EE/CS, have strong programming skills in C++, and deep familiarity with object-oriented programming methods.
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Prior knowledge and experience with distributed/multi-threaded programming, numerical analysis techniques, meshing techniques, finite-element based thermal simulation, CFD analysis, and in-depth understanding of electric cooling of PCB/package/chip preferred.
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Experience on automatic design optimization for thermal targets is a plus.
We’re doing work that matters. Help us solve what others can’t.
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Cadenceについて

Cadence
PublicCadence Design Systems, Inc. is an American multinational technology and computational software company headquartered in San Jose, California.
5,001-10,000
従業員数
San Jose
本社所在地
$8.5B
企業価値
レビュー
4.0
10件のレビュー
ワークライフバランス
4.2
報酬
2.8
企業文化
4.1
キャリア
3.2
経営陣
3.4
72%
友人に勧める
良い点
Good work-life balance and flexible hours
Supportive and collaborative team environment
Good benefits and stable company
改善点
Below market compensation and pay
Limited growth and advancement opportunities
Heavy workload and long hours during peak times
給与レンジ
66件のデータ
Junior/L3
Junior/L3 · Data Analyst
1件のレポート
$91,103
年収総額
基本給
$85,276
ストック
-
ボーナス
$5,827
$59,612
$139,984
面接体験
1件の面接
難易度
3.0
/ 5
期間
14-28週間
面接プロセス
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
よくある質問
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
ニュース&話題
Cadence Design Systems Inc. stock outperforms competitors on strong trading day - MarketWatch
MarketWatch
News
·
1d ago
Album Review: Forager by Cadence Weapon & Junia-T - Shatter the Standards
Shatter the Standards
News
·
1d ago
Cadence Collaborates with TSMC to Accelerate Design of Next-Gen AI Silicon - HPCwire
HPCwire
News
·
1d ago
Cadence Design Systems Targets Faster Chip Design Cycles To Keep Pace With AI - Benzinga
Benzinga
News
·
1d ago




