채용
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Responsible for designing, developing, troubleshooting and debugging PCB/package/chip thermal analysis software.
Works on extremely complex problems where analysis of situations or data requires an evaluation of intangible variance factors.
Position Requirements:
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The candidate should be attending a BS, MS or PhD program in ME/EE/CS, have strong programming skills in C++, and deep familiarity with object-oriented programming methods.
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Prior knowledge and experience with distributed/multi-threaded programming, numerical analysis techniques, meshing techniques, finite-element based thermal simulation, CFD analysis, and in-depth understanding of electric cooling of PCB/package/chip preferred.
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Experience on automatic design optimization for thermal targets is a plus.
We’re doing work that matters. Help us solve what others can’t.
총 조회수
0
총 지원 클릭 수
0
모의 지원자 수
0
스크랩
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비슷한 채용공고
Cadence 소개

Cadence
PublicCadence Design Systems, Inc. is an American multinational technology and computational software company headquartered in San Jose, California.
5,001-10,000
직원 수
San Jose
본사 위치
$8.5B
기업 가치
리뷰
4.0
10개 리뷰
워라밸
4.2
보상
2.8
문화
4.1
커리어
3.2
경영진
3.4
72%
친구에게 추천
장점
Good work-life balance and flexible hours
Supportive and collaborative team environment
Good benefits and stable company
단점
Below market compensation and pay
Limited growth and advancement opportunities
Heavy workload and long hours during peak times
연봉 정보
66개 데이터
Junior/L3
Junior/L3 · Data Analyst
1개 리포트
$91,103
총 연봉
기본급
$85,276
주식
-
보너스
$5,827
$59,612
$139,984
면접 경험
1개 면접
난이도
3.0
/ 5
소요 기간
14-28주
면접 과정
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
자주 나오는 질문
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
뉴스 & 버즈
Cadence Design Systems Inc. stock outperforms competitors on strong trading day - MarketWatch
MarketWatch
News
·
1d ago
Album Review: Forager by Cadence Weapon & Junia-T - Shatter the Standards
Shatter the Standards
News
·
1d ago
Cadence Collaborates with TSMC to Accelerate Design of Next-Gen AI Silicon - HPCwire
HPCwire
News
·
1d ago
Cadence Design Systems Targets Faster Chip Design Cycles To Keep Pace With AI - Benzinga
Benzinga
News
·
1d ago




