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채용Cadence

Sr Principal Verification Engineer

Cadence

Sr Principal Verification Engineer

Cadence

NOIDA; BANGALORE

·

On-site

·

Full-time

·

1mo ago

필수 스킬

Machine Learning

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Position: Sr Principal Verification Engineer -Applied ML – Functional Verification

About Us

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Position Overview

We are seeking results driven Pre-Silicon Verification Engineer with extensive experience in function verification (formal verification and/or simulation/UVM verification) and a passion for leveraging artificial intelligence to redefine the verification landscape. In this role, you will operate at the forefront of semiconductor design and AI innovation, utilizing advanced AI tools to architect, design, and validate the next generation of verification methodologies. You will collaborate closely with a highly skilled team of machine learning engineers experienced in training large language models on a scale, as well as accomplished software engineers with proven expertise in product development and deployment.

Key Responsibilities

  • Contribute to the application of machine learning techniques aimed at streamlining traditional pre-silicon functional verification methodologies like formal verification and UVM.
  • Develop agentic AI solutions using LLMs and latest ML technologies to accelerate pre-silicon Design Verification process.
  • Employ AI enhanced Electronic Design Automation (EDA) tools to improve and expedite both the design and verification lifecycles.
  • Engage directly with customers to understand requirements and deliver innovative, practical verification strategies.
  • Collaborate effectively with machine learning and software engineering teams to validate output correctness, efficiency, and quality.
  • Maintain current knowledge of advancements in AI-powered hardware verification and actively participate in fostering internal knowledge growth.

Required Qualifications

  • Bachelor's or master's degree in electrical engineering, Computer Engineering, or related field.
  • Proven expertise of more than 12-15 years in at least one of the pre-silicon ASIC verification methodologies such as Formal, SV/UVM and/or OVM.
  • Advanced skills in debugging pre-silicon verification failures using waveform viewers and simulation analysis tools.
  • Hands-on experience with industry standard EDA tools (e.g., Jasper, Xcelium, IMC).
  • Strong programming skills in Verilog, System Verilog and Python
  • Excellent communication skills and the ability to thrive in a team-oriented environment.
  • Self-motivated, with a proactive approach to problem solving, continuous learning, and innovation.
  • Exposure to LLMs and ML technologies like RAG, RFT, RL, and Agentic frameworks would be a plus.

The Cadence Advantage

  • The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
  • Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
  • The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
  • Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
  • You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

We’re doing work that matters. Help us solve what others can’t.

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Cadence 소개

Cadence

Cadence

Public

Cadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.

5,001-10,000

직원 수

San Jose

본사 위치

$8.5B

기업 가치

리뷰

4.0

10개 리뷰

워라밸

4.2

보상

2.8

문화

4.1

커리어

3.2

경영진

3.4

72%

친구에게 추천

장점

Good work-life balance

Supportive and collaborative team environment

Flexible work arrangements

단점

Below market compensation

Limited career advancement opportunities

Heavy workload and long hours

연봉 정보

58개 데이터

Junior/L3

Junior/L3 · Data Analyst

1개 리포트

$91,103

총 연봉

기본급

$85,276

주식

-

보너스

$5,827

$59,612

$139,984

면접 경험

1개 면접

난이도

3.0

/ 5

소요 기간

14-28주

면접 과정

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Onsite/Virtual Interviews

5

Final Decision

자주 나오는 질문

Technical Knowledge

Behavioral/STAR

Past Experience

Problem Solving