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•Healthcare
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필수 스킬
TypeScript
Python
React
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Role and Responsibility:
The Functional Safety Engineer will be responsible for the ISO 26262 safety plan implementation for the Silicon Solutions Group (SSG) IP's (including but not limited to processors, hardware accelerators and controllers) targeted for automotive products, and development of ISO 26262 compliant processes, infrastructure and work products. He/she will work with the safety organizations of our customers, vendors, external safety expert consultants and internal product development teams to ensure that the functional safety process is well understood, executed and documented.
This role will be an integral part of an agile engineering team that focuses on bringing safety and cybersecurity solutions per the ISO 26262 and ISO 21434 standards to Cadence customers in the fast growing Automotive/ADAS markets.
This individual will support the organization's mission, vision, and values by exhibiting the following behaviors: excellence and competence, collaboration, flexibility, innovation, respect, accountability, ownership, and a sense of humor.
Specific Duties and Responsibilities:
- Act as Functional Safety Engineer for Cadence/SSG Safety related HW & SW products
- Create and/or support functional safety work products according to ISO 26262 which include the Safety Plan, Safety Manual, Safety Requirements, and Safety Analysis including qualitative and quantitative FMEDA, and Safety Verification and Validation activities on SSG IP's as a SEooC (Safety Element out of Context).
- Collaborate with project engineers, marketing & development team, safety consultants, vendors and customers on Functional Safety activities
- Work with architecture team on Functional Safety products to propose safety features and define the safety architecture
- Create/review functional safety documentation according to ISO 26262
- Conduct reviews with product teams to ensure functional safety standards are being met throughout product development cycles
Requirements:
- BSEE/BS Computer Science, Computer Engineering, Electrical Engineering (or equivalent). MS preferred.
- 5 or more years of total relevant work experience.
- Experience or familiarity with Microprocessor, DSP, hardware accelerator and hardware accelerator architecture/design and verification processes, SoC/ASIC design methodologies (RTL and Synthesis).
- Willingness and motivation to learn and apply standard compliance requirements of emerging markets
- Strong analytical and problem-solving skills and clear, concise documentation writing skills
- Excellent verbal and written communications skills and the ability to communicate complex ideas succinctly and persuasively to peers, management, customers and partners.
Good To Have:
- Experience in ISO 26262, safety certification strongly preferred.
- Experience in FMEDA, DFA, FMEA, FTA
- Proven record of taking customer safety requirements from concept to final product
- Scripting, programming and process automation skill
- Experience in fault injection techniques
- Familiarity with Configuration, Requirements, and Documentation Management tools (e.g. Perforce, Jama, JIRA, etc)
- Knowledge of ISO 21434
- Knowledge of ISO 9001 Quality Management standard
- Experience with embedded HW/SW systems Product Development Life Cycle (Processors, Software)
Travel: Occasional travel, including international travel, may be required.
Work Environment:
Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.
The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
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Cadence 소개

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
직원 수
San Jose
본사 위치
$8.5B
기업 가치
리뷰
4.0
10개 리뷰
워라밸
4.2
보상
2.8
문화
4.1
커리어
3.2
경영진
3.4
72%
친구에게 추천
장점
Good work-life balance
Supportive and collaborative team environment
Flexible work arrangements
단점
Below market compensation
Limited career advancement opportunities
Heavy workload and long hours
연봉 정보
58개 데이터
Mid/L4
Mid/L4 · Design Engineer
6개 리포트
$139,837
총 연봉
기본급
$124,197
주식
-
보너스
-
$110,434
$186,828
면접 경험
1개 면접
난이도
3.0
/ 5
소요 기간
14-28주
면접 과정
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
자주 나오는 질문
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
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