招聘
福利待遇
•Equity
•Healthcare
•Learning
•Flexible Hours
•Parental Leave
必备技能
Node.js
TypeScript
Python
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.GCS AE Job Description Document Job Title:
- Lead Application Engineer
- GCS
Location: Bangalore / Noida
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
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The Cadence Advantage
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The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
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Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
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The unique “One Cadence – One Team” culture builds and fosters diversity, equity and inclusion to maximize our ability to innovate, drive growth, and win with our customers. Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization.
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Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
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You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.
Job Summary:
As a member of the GCS Organization for the MSA (Multiphysics System Analysis), you will partner with world-wide Cadence customers to provide post sales technical consultation for IC level Power System analysis products for implementing cutting-edge designs. This involves working closely with the customers to understand and debug complex issues enabling them to proceed further with design cycle phases, help them leverage the latest tool capabilities, and guide them with implementation of software in their design methodologies. You will have an opportunity to acquire both breadth and depth of technical knowledge, get wide exposure to the latest design practices in industry and demonstrate expertise by authoring high impact knowledge content.
This role also provides opportunity to participate in the evolution of key technology solutions to the most pressing design problems. In this role, you will have the opportunity to work with product teams to identify and prioritize the product improvement initiatives with your timely feedback and observations.
This an excellent opportunity to work in a supportive, flexible and friendly work environment that GCS offers, where we are vested in each other’s success, and are passionate about technology and innovation.
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Job Responsibilities
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Provide technical support for Voltus product from the Multiphysics System Analysis (MSA) toolset of Cadence products with focus on productivity, and customer satisfaction
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Support multiple tools/methods for customer requiring general domain knowledge and developing business experience
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Assist in creation of high quality and impactful knowledge content in MSA domain
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Work independently at Cadence or customer facilities to deliver quality results according to schedule requirements
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Work on problems of moderate scope that may require analysis of situations, data or tool problems
Qualifications:
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Bachelor’s Degree in; Electrical / Electronics / Electronics and Communication / VLSI Engineering with 5-7 years related experience
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OR Masters with 3-4 years of related experience
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OR PhD with 1 years of related experience
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Experience and Technical Skills required
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3-7 years relevant industry experience in EMIR analysis, PDN analysis with digital signoff tools and Digital Physical implementation as designer or methodology/flow expert
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Strong background in Digital logic Design, CMOS logic Design, Power IR drop analysis, Circuit Design and Analysis, Digital and Behavioral simulation fundamentals related to IC and Package Design
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Debugging of Low power and multiple power domain analysis for chip power integrity sign-off.
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Understanding of Digital design toolsets of Cadence (Genus/Innovus/Tempus/Conformal); knowledgeable of at least 50% of a given flow; detailed knowledge in one CDN tool, learning others; ability to analyze customer's environment and evaluate appropriate support solutions; learning competitive tools/technologies
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Must have excellent debugging skills and ability to separate out the critical issues from trivial ones.
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Ability to solve interface level problems emanating from IC Implementation side and System analysis side.
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Ability to debug Timing and thermal issues in relation to IR and EM is a plus
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Good understanding of Hardware description languages like VHDL, Verilog, System Verilog.
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Knowledge on TCL, Perl or Python scripting.
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Behavioral skills required
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Must possess strong written, verbal and presentation skills
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Ability to establish a close working relationship with both customer peers and management
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Explore what’s possible to get the job done, including creative use of unconventional solutions
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Work effectively across functions and geographies
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Push to raise the bar while always operating with integrity
We’re doing work that matters. Help us solve what others can’t.
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关于Cadence

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
员工数
San Jose
总部位置
$8.5B
企业估值
评价
4.0
10条评价
工作生活平衡
4.2
薪酬
2.8
企业文化
4.1
职业发展
3.2
管理层
3.4
72%
推荐给朋友
优点
Good work-life balance
Supportive and collaborative team environment
Flexible work arrangements
缺点
Below market compensation
Limited career advancement opportunities
Heavy workload and long hours
薪资范围
58个数据点
Junior/L3
Junior/L3 · Data Analyst
1份报告
$91,103
年薪总额
基本工资
$85,276
股票
-
奖金
$5,827
$59,612
$139,984
面试经验
1次面试
难度
3.0
/ 5
时长
14-28周
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
常见问题
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
新闻动态
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